07ce0166ac
The patch has been accepted upstream with some minor changes. Update it to match the version upstream.
43 lines
1.6 KiB
Diff
43 lines
1.6 KiB
Diff
From 56a72e014fcda3c52cf119115cb71fce2fad86d8 Mon Sep 17 00:00:00 2001
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From: Dave Airlie <airlied@redhat.com>
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Date: Thu, 21 Dec 2023 10:39:08 +1000
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Subject: [PATCH] intel/compiler: reemit boolean resolve for inverted if on
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gen5
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Gen5 adds some boolean conversion instructions after nir emits,
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but that nir srcs don't line up with them, so reemit the boolean
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conversion if we reemit the inot.
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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Fixes: 31b5f5a51f3a ("nir/opt_if: Simplify if's with general conditions")
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>
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---
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src/intel/compiler/brw_fs_nir.cpp | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
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index 33f2a4046b2..ccdd0fe7db8 100644
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--- a/src/intel/compiler/brw_fs_nir.cpp
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+++ b/src/intel/compiler/brw_fs_nir.cpp
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@@ -422,6 +422,17 @@ fs_nir_emit_if(nir_to_brw_state &ntb, nir_if *if_stmt)
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invert = true;
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cond_reg = get_nir_src(ntb, cond->src[0].src);
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cond_reg = offset(cond_reg, bld, cond->src[0].swizzle[0]);
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+
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+ if (devinfo->ver <= 5 &&
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+ (cond->instr.pass_flags & BRW_NIR_BOOLEAN_MASK) == BRW_NIR_BOOLEAN_NEEDS_RESOLVE) {
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+ /* redo boolean resolve on gen5 */
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+ fs_reg masked = ntb.s.vgrf(glsl_int_type());
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+ bld.AND(masked, cond_reg, brw_imm_d(1));
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+ masked.negate = true;
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+ fs_reg tmp = bld.vgrf(cond_reg.type);
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+ bld.MOV(retype(tmp, BRW_REGISTER_TYPE_D), masked);
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+ cond_reg = tmp;
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+ }
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} else {
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invert = false;
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cond_reg = get_nir_src(ntb, if_stmt->condition);
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--
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2.43.0
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