import mesa-20.1.2-3.el8

.gitignore

@@ -1 +1 @@
-SOURCES/mesa-19.3.0-rc4.tar.xz
+SOURCES/mesa-20.1.2.tar.xz

.mesa.metadata

@@ -1 +1 @@
-f4eeb09a7dece984364a509154170a85deee9ea0 SOURCES/mesa-19.3.0-rc4.tar.xz
+b90fe9ca8c3bdad043e86cd1af93bcf83e1da3fb SOURCES/mesa-20.1.2.tar.xz

SOURCES/0001-gallivm-nir-fix-big-endian-64-bit-splitting-merging.patch

@@ -0,0 +1,45 @@
+From fcf3f45728a22250ad15db7e230545147fc28c2e Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 29 Jun 2020 14:59:20 +1000
+Subject: [PATCH] gallivm/nir: fix big-endian 64-bit splitting/merging.
+
+The shuffles need to be swapped to do this properly on big-endian
+---
+ src/gallium/auxiliary/gallivm/lp_bld_nir.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+index f14475e839d..2c4135ccc05 100644
+--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
++++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+@@ -353,8 +353,13 @@ static LLVMValueRef split_64bit(struct lp_build_nir_context *bld_base,
+    LLVMValueRef shuffles2[LP_MAX_VECTOR_WIDTH/32];
+    int len = bld_base->base.type.length * 2;
+    for (unsigned i = 0; i < bld_base->base.type.length; i++) {
++#if UTIL_ARCH_LITTLE_ENDIAN
+       shuffles[i] = lp_build_const_int32(gallivm, i * 2);
+       shuffles2[i] = lp_build_const_int32(gallivm, (i * 2) + 1);
++#else
++      shuffles[i] = lp_build_const_int32(gallivm, (i * 2) + 1);
++      shuffles2[i] = lp_build_const_int32(gallivm, (i * 2));
++#endif
+    }
+ 
+    src = LLVMBuildBitCast(gallivm->builder, src, LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), len), "");
+@@ -378,8 +383,13 @@ merge_64bit(struct lp_build_nir_context *bld_base,
+    assert(len <= (2 * (LP_MAX_VECTOR_WIDTH/32)));
+ 
+    for (i = 0; i < bld_base->base.type.length * 2; i+=2) {
++#if UTIL_ARCH_LITTLE_ENDIAN
+       shuffles[i] = lp_build_const_int32(gallivm, i / 2);
+       shuffles[i + 1] = lp_build_const_int32(gallivm, i / 2 + bld_base->base.type.length);
++#else
++      shuffles[i] = lp_build_const_int32(gallivm, i / 2 + bld_base->base.type.length);
++      shuffles[i + 1] = lp_build_const_int32(gallivm, i / 2);
++#endif
+    }
+    return LLVMBuildShuffleVector(builder, input, input2, LLVMConstVector(shuffles, len), "");
+ }
+-- 
+2.26.2
+

SOURCES/0001-gallivm-nir-fix-const-loading-on-big-endian-systems.patch

@@ -0,0 +1,33 @@
+From ea7bf3941eeef8320c711a6f66b5e73077cc6e6b Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 29 Jun 2020 07:40:13 +1000
+Subject: [PATCH] gallivm/nir: fix const loading on big endian systems
+
+The code was expecting the lower 32-bits of the 64-bit to be
+what it wanted, don't be implicit, pull the value from the union.
+
+This should fix rendering on big endian systems since NIR was
+introduced.
+
+Fixes: 44a6b0107b37 ("gallivm: add nir->llvm translation (v2)")
+Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
+---
+ src/gallium/auxiliary/gallivm/lp_bld_nir.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+index 9aa582a0e8a..f14475e839d 100644
+--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
++++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+@@ -865,7 +865,7 @@ static void visit_load_const(struct lp_build_nir_context *bld_base,
+    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS];
+    struct lp_build_context *int_bld = get_int_bld(bld_base, true, instr->def.bit_size);
+    for (unsigned i = 0; i < instr->def.num_components; i++)
+-      result[i] = lp_build_const_int_vec(bld_base->base.gallivm, int_bld->type, instr->value[i].u64);
++      result[i] = lp_build_const_int_vec(bld_base->base.gallivm, int_bld->type, instr->def.bit_size == 32 ? instr->value[i].u32 : instr->value[i].u64);
+    assign_ssa_dest(bld_base, &instr->def, result);
+ }
+ 
+-- 
+2.26.2
+

SOURCES/0001-glsl-fix-constant-packing-for-64-bit-big-endian.patch

@@ -0,0 +1,81 @@
+From 5fc0b580cecb1529659d5d3719412fb7cbffac0d Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 29 Jun 2020 13:26:56 +1000
+Subject: [PATCH] glsl: fix constant packing for 64-bit big endian.
+
+In a piglit run on s390 a lot of double tests fail, explicitly
+packing/shifting things rather than using memcpy seems to help
+---
+ src/compiler/glsl/ir_constant_expression.cpp | 15 +++++++++++++++
+ src/compiler/glsl/ir_expression_operation.py | 20 ++++++++++----------
+ 2 files changed, 25 insertions(+), 10 deletions(-)
+
+diff --git a/src/compiler/glsl/ir_constant_expression.cpp b/src/compiler/glsl/ir_constant_expression.cpp
+index 636196886b3..595cc821797 100644
+--- a/src/compiler/glsl/ir_constant_expression.cpp
++++ b/src/compiler/glsl/ir_constant_expression.cpp
+@@ -452,6 +452,21 @@ isub64_saturate(int64_t a, int64_t b)
+    return a - b;
+ }
+ 
++static uint64_t
++pack_2x32(uint32_t a, uint32_t b)
++{
++   uint64_t v = a;
++   v |= (uint64_t)b << 32;
++   return v;
++}
++
++static void
++unpack_2x32(uint64_t p, uint32_t *a, uint32_t *b)
++{
++   *a = p & 0xffffffff;
++   *b = (p >> 32);
++}
++
+ /**
+  * Get the constant that is ultimately referenced by an r-value, in a constant
+  * expression evaluation context.
+diff --git a/src/compiler/glsl/ir_expression_operation.py b/src/compiler/glsl/ir_expression_operation.py
+index d2c4d41024f..1c4e6b358e1 100644
+--- a/src/compiler/glsl/ir_expression_operation.py
++++ b/src/compiler/glsl/ir_expression_operation.py
+@@ -560,14 +560,14 @@ ir_expression_operation = [
+    operation("saturate", 1, printable_name="sat", source_types=(float_type,), c_expression="CLAMP({src0}, 0.0f, 1.0f)"),
+ 
+    # Double packing, part of ARB_gpu_shader_fp64.
+-   operation("pack_double_2x32", 1, printable_name="packDouble2x32", source_types=(uint_type,), dest_type=double_type, c_expression="memcpy(&data.d[0], &op[0]->value.u[0], sizeof(double))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("unpack_double_2x32", 1, printable_name="unpackDouble2x32", source_types=(double_type,), dest_type=uint_type, c_expression="memcpy(&data.u[0], &op[0]->value.d[0], sizeof(double))", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("pack_double_2x32", 1, printable_name="packDouble2x32", source_types=(uint_type,), dest_type=double_type, c_expression="data.u64[0] = pack_2x32(op[0]->value.u[0], op[0]->value.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("unpack_double_2x32", 1, printable_name="unpackDouble2x32", source_types=(double_type,), dest_type=uint_type, c_expression="unpack_2x32(op[0]->value.u64[0], &data.u[0], &data.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
+ 
+    # Sampler/Image packing, part of ARB_bindless_texture.
+-   operation("pack_sampler_2x32", 1, printable_name="packSampler2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("pack_image_2x32", 1, printable_name="packImage2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("unpack_sampler_2x32", 1, printable_name="unpackSampler2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("unpack_image_2x32", 1, printable_name="unpackImage2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("pack_sampler_2x32", 1, printable_name="packSampler2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="data.u64[0] = pack_2x32(op[0]->value.u[0], op[0]->value.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("pack_image_2x32", 1, printable_name="packImage2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="data.u64[0] = pack_2x32(op[0]->value.u[0], op[0]->value.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("unpack_sampler_2x32", 1, printable_name="unpackSampler2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="unpack_2x32(op[0]->value.u64[0], &data.u[0], &data.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("unpack_image_2x32", 1, printable_name="unpackImage2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="unpack_2x32(op[0]->value.u64[0], &data.u[0], &data.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
+ 
+    operation("frexp_sig", 1),
+    operation("frexp_exp", 1),
+@@ -592,10 +592,10 @@ ir_expression_operation = [
+    operation("ssbo_unsized_array_length", 1),
+ 
+    # 64-bit integer packing ops.
+-   operation("pack_int_2x32", 1, printable_name="packInt2x32", source_types=(int_type,), dest_type=int64_type, c_expression="memcpy(&data.i64[0], &op[0]->value.i[0], sizeof(int64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("pack_uint_2x32", 1, printable_name="packUint2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("unpack_int_2x32", 1, printable_name="unpackInt2x32", source_types=(int64_type,), dest_type=int_type, c_expression="memcpy(&data.i[0], &op[0]->value.i64[0], sizeof(int64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
+-   operation("unpack_uint_2x32", 1, printable_name="unpackUint2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t))", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("pack_int_2x32", 1, printable_name="packInt2x32", source_types=(int_type,), dest_type=int64_type, c_expression="data.u64[0] = pack_2x32(op[0]->value.u[0], op[0]->value.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("pack_uint_2x32", 1, printable_name="packUint2x32", source_types=(uint_type,), dest_type=uint64_type, c_expression="data.u64[0] = pack_2x32(op[0]->value.u[0], op[0]->value.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("unpack_int_2x32", 1, printable_name="unpackInt2x32", source_types=(int64_type,), dest_type=int_type, c_expression="unpack_2x32(op[0]->value.u64[0], &data.u[0], &data.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
++   operation("unpack_uint_2x32", 1, printable_name="unpackUint2x32", source_types=(uint64_type,), dest_type=uint_type, c_expression="unpack_2x32(op[0]->value.u64[0], &data.u[0], &data.u[1])", flags=frozenset((horizontal_operation, non_assign_operation))),
+ 
+    operation("add", 2, printable_name="+", source_types=numeric_types, c_expression="{src0} + {src1}", flags=vector_scalar_operation),
+    operation("sub", 2, printable_name="-", source_types=numeric_types, c_expression="{src0} - {src1}", flags=vector_scalar_operation),
+-- 
+2.26.2
+

SOURCES/0001-llvmpipe-ppc-fix-if-ifdef-confusion-in-backport.patch

@@ -1,26 +0,0 @@
-From 27d0c526ec926de8eca10917b4a1b68080f45187 Mon Sep 17 00:00:00 2001
-From: Dave Airlie <airlied@redhat.com>
-Date: Thu, 21 Nov 2019 05:53:03 +1000
-Subject: [PATCH] llvmpipe/ppc: fix if/ifdef confusion in backport.
-
-Fixes: 32aba91c07f (llvmpipe: use ppc64le/ppc64 Large code model for JIT-compiled shaders)
----
- src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
-index ee27f346254..89d3fb9133b 100644
---- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
-+++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
-@@ -469,7 +469,7 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
-     */
-    builder.setCodeModel(CodeModel::Large);
- 
--#if PIPE_ARCH_LITTLE_ENDIAN
-+#ifdef PIPE_ARCH_LITTLE_ENDIAN
-    /*
-     * Versions of LLVM prior to 4.0 lacked a table entry for "POWER8NVL",
-     * resulting in (big-endian) "generic" being returned on
--- 
-2.21.0
-

SOURCES/0001-nir-use-bitfield_insert-instead-of-bfi-in-nir_lower_.patch

@@ -0,0 +1,34 @@
+From d3ec950f0d8492b980a91844ffd744d7e7824277 Mon Sep 17 00:00:00 2001
+From: Ben Skeggs <bskeggs@redhat.com>
+Date: Sat, 6 Jun 2020 16:58:00 +1000
+Subject: [PATCH] nir: use bitfield_insert instead of bfi in
+ nir_lower_double_ops
+
+NVIDIA hardware doesn't have an equivilant to bfi, but we do already have
+a lowering for bitfield_insert->bfi.
+
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
+Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5373>
+---
+ src/compiler/nir/nir_lower_double_ops.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/src/compiler/nir/nir_lower_double_ops.c b/src/compiler/nir/nir_lower_double_ops.c
+index f9c93a910a5..73226fd62ef 100644
+--- a/src/compiler/nir/nir_lower_double_ops.c
++++ b/src/compiler/nir/nir_lower_double_ops.c
+@@ -49,7 +49,9 @@ set_exponent(nir_builder *b, nir_ssa_def *src, nir_ssa_def *exp)
+    /* The exponent is bits 52-62, or 20-30 of the high word, so set the exponent
+     * to 1023
+     */
+-   nir_ssa_def *new_hi = nir_bfi(b, nir_imm_int(b, 0x7ff00000), exp, hi);
++   nir_ssa_def *new_hi = nir_bitfield_insert(b, hi, exp,
++                                             nir_imm_int(b, 20),
++                                             nir_imm_int(b, 11));
+    /* recombine */
+    return nir_pack_64_2x32_split(b, lo, new_hi);
+ }
+-- 
+2.26.2
+

SOURCES/Makefile

@@ -1,4 +1,4 @@
-VERSION ?= 19.3.0-rc4
+VERSION ?= 20.1.2
 SANITIZE ?= 1
 
 DIRNAME = mesa-${VERSION}
@@ -10,7 +10,7 @@ clean:
 	rm -f mesa-${VERSION}.tar.xz
 
 clone: clean
-	curl -O https://mesa.freedesktop.org/archive/mesa-${VERSION}.tar.xz
+	curl -O https://archive.mesa3d.org/mesa-${VERSION}.tar.xz
 	tar xf mesa-${VERSION}.tar.xz
 
 sanitize: clone vl_mpeg12_decoder.c vl_decoder.c

SPECS/mesa.spec

@@ -12,6 +12,7 @@
 %define platform_drivers ,i965
 %define with_vmware 1
 %define with_xa     1
+%define with_iris   1
 %endif
 
 %ifarch %{ix86} x86_64
@@ -36,11 +37,11 @@
 
 %global sanitize 0
 
-%global rctag rc4
+#global rctag rc4
 
 Name:           mesa
 Summary:        Mesa graphics libraries
-Version:        19.3.0
+Version:        20.1.2
 Release:        3%{?rctag:.%{rctag}}%{?dist}
 
 License:        MIT
@@ -55,7 +56,15 @@ Source3:        Makefile
 # Fedora opts to ignore the optional part of clause 2 and treat that code as 2 clause BSD.
 Source4:        Mesa-MLAA-License-Clarification-Email.txt
 
-Patch1:		0001-llvmpipe-ppc-fix-if-ifdef-confusion-in-backport.patch
+# fix llvmpipe big-endian (#1847064)
+Patch1: 0001-gallivm-nir-fix-const-loading-on-big-endian-systems.patch
+Patch2: 0001-glsl-fix-constant-packing-for-64-bit-big-endian.patch
+Patch3: 0001-gallivm-nir-fix-big-endian-64-bit-splitting-merging.patch
+
+# Add support for TU11x nvidia
+Patch10: 0001-nir-use-bitfield_insert-instead-of-bfi-in-nir_lower_.patch
+Patch11: nouveau-tu1xx-support.patch
+
 BuildRequires:  gcc
 BuildRequires:  gcc-c++
 
@@ -323,7 +332,7 @@ export ASFLAGS="--generate-missing-build-notes=yes"
   -Ddri3=true \
   -Ddri-drivers=%{?dri_drivers} \
 %if 0%{?with_hardware}
-  -Dgallium-drivers=swrast,virgl,nouveau%{?with_vmware:,svga},radeonsi,r600%{?with_freedreno:,freedreno}%{?with_etnaviv:,etnaviv}%{?with_tegra:,tegra}%{?with_vc4:,vc4}%{?with_kmsro:,kmsro} \
+  -Dgallium-drivers=swrast%{?with_iris:,iris},virgl,nouveau%{?with_vmware:,svga},radeonsi,r600%{?with_freedreno:,freedreno}%{?with_etnaviv:,etnaviv}%{?with_tegra:,tegra}%{?with_vc4:,vc4}%{?with_kmsro:,kmsro} \
 %else
   -Dgallium-drivers=swrast,virgl \
 %endif
@@ -350,6 +359,7 @@ export ASFLAGS="--generate-missing-build-notes=yes"
   -Dbuild-tests=false \
   -Dselinux=true \
   -Dosmesa=gallium \
+  -Dvulkan-device-select-layer=true \
   %{nil}
 %meson_build
 
@@ -484,6 +494,7 @@ done
 %{_libdir}/dri/radeonsi_dri.so
 %ifarch %{ix86} x86_64
 %{_libdir}/dri/i965_dri.so
+%{_libdir}/dri/iris_dri.so
 %endif
 %if 0%{?with_vc4}
 %{_libdir}/dri/vc4_dri.so
@@ -532,12 +543,43 @@ done
 %{_datadir}/vulkan/icd.d/intel_icd.i686.json
 %{_datadir}/vulkan/icd.d/radeon_icd.i686.json
 %endif
+%{_libdir}/libVkLayer_MESA_device_select.so
+%{_datadir}/vulkan/implicit_layer.d/VkLayer_MESA_device_select.json
 
 %files vulkan-devel
 %{_includedir}/vulkan/
 %endif
 
 %changelog
+* Mon Jun 29 2020 Dave Airlie <airlied@redhat.com> - 20.1.2-3
+- a fix on top of the big-endian fix (#1847064)
+
+* Mon Jun 29 2020 Dave Airlie <airlied@redhat.com> - 20.1.2-2
+- add another fix for big-endian llvmpipe (#1847064)
+
+* Mon Jun 29 2020 Dave Airlie <airlied@redhat.com> - 20.1.2-1
+- Update to 20.1.2
+- add fix for big-endian llvmpipe (#1847064)
+
+* Thu Jun 11 2020 Dave Airlie <airlied@redhat.com> - 20.1.1-1
+- Update to 20.1.1
+- Add support for turing
+
+* Thu May 28 2020 Dave Airlie <airlied@redhat.com> - 20.1.0-1
+- Update to 20.1.0 final
+
+* Mon May 25 2020 Dave Airlie <airlied@redhat.com> - 20.1.0-0.1.rc4
+- Update to 20.1.0-rc4
+
+* Thu Feb 20 2020 Dave Airlie <airlied@redhat.com> - 19.3.4-2
+- Fix put image shm fallback path.
+
+* Sat Feb 15 2020 Dave Airlie <airlied@redhat.com> - 19.3.4-1
+- Update to 19.3.4 release (s390x fix)
+
+* Thu Jan 30 2020 Dave Airlie <airlied@redhat.com> - 19.3.3-1
+- Update to 19.3.3 release
+
 * Mon Nov 25 2019 Dave Airlie <airlied@redhat.com> - 19.3.0-3
 - drop khr-devel subpackage from here