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10.2-rc1 upstream release

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Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
This commit is contained in:
Igor Gnatenko 2014-05-05 10:16:25 +04:00
parent fcf27045cb
commit 000ebe36be
11 changed files with 65 additions and 264 deletions
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1
.gitignore vendored
View File

@ -69,3 +69,4 @@ mesa-20100720.tar.bz2
/mesa-20140305.tar.xz /mesa-20140305.tar.xz
/mesa-20140419.tar.xz /mesa-20140419.tar.xz
/mesa-20140430.tar.xz /mesa-20140430.tar.xz
/mesa-20140505.tar.xz

48
0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
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@ -1,48 +0,0 @@
From 5fe1a0ebadea1dbcdbd1b7a92969a283dcbb3362 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 17:35:59 +0200
Subject: [PATCH 1/3] gallium: Add PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Bruno Jiménez:
v2: Updated the docs
v3: Remove trailing comma
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/include/pipe/p_defines.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index f5acebb..e22435c 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -313,6 +313,8 @@ pipe_screen::get_compute_param.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
allocation in bytes. Value type: ``uint64_t``.
+* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
+ clock in MHz. Value type: ``uint32_t``
.. _pipe_bind:
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index fec17f9..9436e7e 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -642,7 +642,8 @@ enum pipe_compute_cap
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
- PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
};
/**
--
1.9.0

32
0001-opencl-use-versioned-.so-in-mesa.icd.patch
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@ -1,4 +1,4 @@
From 348caa4b9ab2b00871c8ea73aaf59311f9a853e8 Mon Sep 17 00:00:00 2001 From 6da9f2a229a1b519e8cd1f794d6c2a63fedfa92e Mon Sep 17 00:00:00 2001
From: Igor Gnatenko <i.gnatenko.brain@gmail.com> From: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Date: Sun, 12 Jan 2014 02:09:16 +0400 Date: Sun, 12 Jan 2014 02:09:16 +0400
Subject: [PATCH] opencl: use versioned .so in mesa.icd Subject: [PATCH] opencl: use versioned .so in mesa.icd
@ -19,7 +19,7 @@ Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
create mode 100644 src/gallium/targets/opencl/mesa.icd.in create mode 100644 src/gallium/targets/opencl/mesa.icd.in
diff --git a/configure.ac b/configure.ac diff --git a/configure.ac b/configure.ac
index 4da6c51..c195b1b 100644 index e77ed77..e363c03 100644
--- a/configure.ac --- a/configure.ac
+++ b/configure.ac +++ b/configure.ac
@@ -25,6 +25,8 @@ m4_ifdef([AM_PROG_AR], [AM_PROG_AR]) @@ -25,6 +25,8 @@ m4_ifdef([AM_PROG_AR], [AM_PROG_AR])
@ -30,28 +30,28 @@ index 4da6c51..c195b1b 100644
+AC_SUBST([OPENCL_VERSION]) +AC_SUBST([OPENCL_VERSION])
dnl Versions for external dependencies dnl Versions for external dependencies
LIBDRM_REQUIRED=2.4.24 LIBDRM_REQUIRED=2.4.38
@@ -2023,6 +2025,7 @@ AC_CONFIG_FILES([Makefile @@ -2084,6 +2086,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/targets/egl-static/Makefile src/gallium/targets/egl-static/Makefile
src/gallium/targets/gbm/Makefile src/gallium/targets/gbm/Makefile
src/gallium/targets/opencl/Makefile src/gallium/targets/opencl/Makefile
+ src/gallium/targets/opencl/mesa.icd + src/gallium/targets/opencl/mesa.icd
src/gallium/targets/osmesa/Makefile src/gallium/targets/xa/Makefile
src/gallium/targets/osmesa/osmesa.pc src/gallium/targets/xa/xatracker.pc
src/gallium/targets/pipe-loader/Makefile src/gallium/targets/omx-nouveau/Makefile
diff --git a/src/gallium/targets/opencl/Makefile.am b/src/gallium/targets/opencl/Makefile.am diff --git a/src/gallium/targets/opencl/Makefile.am b/src/gallium/targets/opencl/Makefile.am
index 653302c..3b257ca 100644 index ba45aee..0a3d134 100644
--- a/src/gallium/targets/opencl/Makefile.am --- a/src/gallium/targets/opencl/Makefile.am
+++ b/src/gallium/targets/opencl/Makefile.am +++ b/src/gallium/targets/opencl/Makefile.am
@@ -4,7 +4,7 @@ lib_LTLIBRARIES = lib@OPENCL_LIBNAME@.la @@ -5,7 +5,7 @@ lib_LTLIBRARIES = lib@OPENCL_LIBNAME@.la
lib@OPENCL_LIBNAME@_la_LDFLAGS = \ lib@OPENCL_LIBNAME@_la_LDFLAGS = \
$(LLVM_LDFLAGS) \ $(LLVM_LDFLAGS) \
- -version-number 1:0 -no-undefined \
+ -version-number @OPENCL_VERSION@:0 - -version-number 1:0 \
+ -version-number @OPENCL_VERSION@:0 \
lib@OPENCL_LIBNAME@_la_LIBADD = \ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/opencl/opencl.sym \
$(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader.la \ $(GC_SECTIONS) \
$(LD_NO_UNDEFINED)
diff --git a/src/gallium/targets/opencl/mesa.icd b/src/gallium/targets/opencl/mesa.icd diff --git a/src/gallium/targets/opencl/mesa.icd b/src/gallium/targets/opencl/mesa.icd
deleted file mode 100644 deleted file mode 100644
index 6a6a870..0000000 index 6a6a870..0000000
@ -67,5 +67,5 @@ index 0000000..1b77b4e
@@ -0,0 +1 @@ @@ -0,0 +1 @@
+lib@OPENCL_LIBNAME@.so.@OPENCL_VERSION@ +lib@OPENCL_LIBNAME@.so.@OPENCL_VERSION@
-- --
1.8.4.2 1.9.0

73
0002-radeon-compute-Implement-PIPE_COMPUTE_CAP_MAX_CLOCK_.patch
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@ -1,73 +0,0 @@
From 0a41054b7faa9df4e4b8802f646a7e078389eb89 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 16:28:40 +0200
Subject: [PATCH 2/3] radeon/compute: Implement
PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Igor Gnatenko:
v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)
Bruno Jiménez:
v3: Convert the frequency to MHz from kHz after getting it in
'do_winsys_init'
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++++++
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++++
src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
3 files changed, 13 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 7508865..957186a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen *screen,
}
return sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
+ if (ret) {
+ uint32_t *max_clock_frequency = ret;
+ *max_clock_frequency = rscreen->info.max_sclk;
+ }
+ return sizeof(uint32_t);
+
default:
fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
return 0;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index b53beba..7618316 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.gart_size = gem_info.gart_size;
ws->info.vram_size = gem_info.vram_size;
+ /* Get max clock frequency info and convert it to MHz */
+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
+ &ws->info.max_sclk);
+ ws->info.max_sclk /= 1000;
+
ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
/* Generation-specific queries. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index fe0617b..1cb17bb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -196,6 +196,7 @@ struct radeon_info {
enum chip_class chip_class;
uint32_t gart_size;
uint32_t vram_size;
+ uint32_t max_sclk;
uint32_t drm_major; /* version */
uint32_t drm_minor;
--
1.9.0

70
0003-clover-Query-drivers-for-max-clock-frequency.patch
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@ -1,70 +0,0 @@
From ca848e8bee7683e296e40a7870750d8a156850ca Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 16:28:41 +0200
Subject: [PATCH 3/3] clover: Query drivers for max clock frequency
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Igor Gnatenko:
v2: PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY instead of
PIPE_COMPUTE_MAX_CLOCK_FREQUENCY
Bruno Jiménez:
v3: Drivers report clock in Mhz
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
src/gallium/state_trackers/clover/api/device.cpp | 2 +-
src/gallium/state_trackers/clover/core/device.cpp | 6 ++++++
src/gallium/state_trackers/clover/core/device.hpp | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/clover/api/device.cpp b/src/gallium/state_trackers/clover/api/device.cpp
index b77a50d..1bc2692 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -153,7 +153,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
break;
case CL_DEVICE_MAX_CLOCK_FREQUENCY:
- buf.as_scalar<cl_uint>() = 0;
+ buf.as_scalar<cl_uint>() = dev.max_clock_frequency();
break;
case CL_DEVICE_ADDRESS_BITS:
diff --git a/src/gallium/state_trackers/clover/core/device.cpp b/src/gallium/state_trackers/clover/core/device.cpp
index 2c5f9b7..2f84677 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -154,6 +154,12 @@ device::max_mem_alloc_size() const {
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE)[0];
}
+cl_uint
+device::max_clock_frequency() const {
+ return get_compute_param<uint32_t>(pipe,
+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY)[0];
+}
+
std::vector<size_t>
device::max_block_size() const {
auto v = get_compute_param<uint64_t>(pipe, PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE);
diff --git a/src/gallium/state_trackers/clover/core/device.hpp b/src/gallium/state_trackers/clover/core/device.hpp
index 433ac81..3662c6b 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -61,6 +61,7 @@ namespace clover {
cl_uint max_const_buffers() const;
size_t max_threads_per_block() const;
cl_ulong max_mem_alloc_size() const;
+ cl_uint max_clock_frequency() const;
std::vector<size_t> max_block_size() const;
std::string device_name() const;
--
1.9.0

4
make-git-snapshot.sh
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@ -15,11 +15,11 @@ DIRNAME=mesa-$( date +%Y%m%d )
echo REF ${REF:+--reference $REF} echo REF ${REF:+--reference $REF}
echo DIRNAME $DIRNAME echo DIRNAME $DIRNAME
echo HEAD ${1:-10.1} echo HEAD ${1:-10.2}
rm -rf $DIRNAME rm -rf $DIRNAME
git clone --depth 1 ${REF:+--reference $REF} --branch 10.1 \ git clone --depth 1 ${REF:+--reference $REF} --branch 10.2 \
git://git.freedesktop.org/git/mesa/mesa $DIRNAME git://git.freedesktop.org/git/mesa/mesa $DIRNAME
GIT_DIR=$DIRNAME/.git git archive --format=tar --prefix=$DIRNAME/ ${1:-HEAD} \ GIT_DIR=$DIRNAME/.git git archive --format=tar --prefix=$DIRNAME/ ${1:-HEAD} \

13
mesa-10.2-evergreen-big-endian.patch Normal file
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@ -0,0 +1,13 @@
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index fabc52c..c276016 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2258,7 +2258,7 @@ uint32_t r600_translate_colorformat(enum chip_class chip, enum pipe_format forma
uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
{
- if (R600_BIG_ENDIAN) {
+ if (0 && R600_BIG_ENDIAN) {
switch(colorformat) {
/* 8-bit buffers. */
case V_0280A0_COLOR_4_4:

12
mesa-9.2-evergreen-big-endian.patch
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@ -1,12 +0,0 @@
diff -up mesa-20130610/src/gallium/drivers/r600/evergreen_state.c.jx mesa-20130610/src/gallium/drivers/r600/evergreen_state.c
--- mesa-20130610/src/gallium/drivers/r600/evergreen_state.c.jx 2013-06-10 13:58:51.000000000 -0400
+++ mesa-20130610/src/gallium/drivers/r600/evergreen_state.c 2013-06-17 10:24:14.687160428 -0400
@@ -615,7 +615,7 @@ static uint32_t r600_translate_colorform
static uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
{
- if (R600_BIG_ENDIAN) {
+ if (0 && R600_BIG_ENDIAN) {
switch(colorformat) {
/* 8-bit buffers. */

20
mesa.spec
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@ -49,13 +49,13 @@
%define _default_patch_fuzz 2 %define _default_patch_fuzz 2
%define gitdate 20140430 %define gitdate 20140505
#% define snapshot #% define snapshot
Summary: Mesa graphics libraries Summary: Mesa graphics libraries
Name: mesa Name: mesa
Version: 10.1.1 Version: 10.2
Release: 3.%{gitdate}%{?dist} Release: 0.rc1.%{gitdate}%{?dist}
License: MIT License: MIT
Group: System Environment/Libraries Group: System Environment/Libraries
URL: http://www.mesa3d.org URL: http://www.mesa3d.org
@ -75,7 +75,7 @@ Patch1: mesa-10.0-nv50-fix-build.patch
Patch9: mesa-8.0-llvmpipe-shmget.patch Patch9: mesa-8.0-llvmpipe-shmget.patch
Patch12: mesa-8.0.1-fix-16bpp.patch Patch12: mesa-8.0.1-fix-16bpp.patch
Patch15: mesa-9.2-hardware-float.patch Patch15: mesa-9.2-hardware-float.patch
Patch20: mesa-9.2-evergreen-big-endian.patch Patch20: mesa-10.2-evergreen-big-endian.patch
# https://bugs.freedesktop.org/show_bug.cgi?id=75797#c1 # https://bugs.freedesktop.org/show_bug.cgi?id=75797#c1
Patch21: 0001-mesa-Don-t-optimize-out-glClear-if-drawbuffer-size-i.patch Patch21: 0001-mesa-Don-t-optimize-out-glClear-if-drawbuffer-size-i.patch
@ -85,11 +85,6 @@ Patch99: 0001-opencl-use-versioned-.so-in-mesa.icd.patch
Patch100: radeonsi-llvm-version-hack.patch Patch100: radeonsi-llvm-version-hack.patch
# https://bugs.freedesktop.org/show_bug.cgi?id=73511
Patch101: 0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
Patch102: 0002-radeon-compute-Implement-PIPE_COMPUTE_CAP_MAX_CLOCK_.patch
Patch103: 0003-clover-Query-drivers-for-max-clock-frequency.patch
BuildRequires: pkgconfig autoconf automake libtool BuildRequires: pkgconfig autoconf automake libtool
%if %{with_hardware} %if %{with_hardware}
BuildRequires: kernel-headers BuildRequires: kernel-headers
@ -343,9 +338,6 @@ grep -q ^/ src/gallium/auxiliary/vl/vl_decoder.c && exit 1
%if 0%{?with_opencl} %if 0%{?with_opencl}
%patch99 -p1 -b .icd %patch99 -p1 -b .icd
%patch101 -p1 -b .gallium_max_clk
%patch102 -p1 -b .radeon_max_clk
%patch103 -p1 -b .clover_max_clk
%endif %endif
%patch100 -p1 -b .radeonsi %patch100 -p1 -b .radeonsi
@ -582,6 +574,7 @@ rm -rf $RPM_BUILD_ROOT
%{_includedir}/GLES3/gl3platform.h %{_includedir}/GLES3/gl3platform.h
%{_includedir}/GLES3/gl3.h %{_includedir}/GLES3/gl3.h
%{_includedir}/GLES3/gl3ext.h %{_includedir}/GLES3/gl3ext.h
%{_includedir}/GLES2/gl31.h
%{_libdir}/pkgconfig/glesv2.pc %{_libdir}/pkgconfig/glesv2.pc
%{_libdir}/libGLESv2.so %{_libdir}/libGLESv2.so
@ -653,6 +646,9 @@ rm -rf $RPM_BUILD_ROOT
%endif %endif
%changelog %changelog
* Mon May 05 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.2-0.rc1.20140505
- 10.2-rc1 upstream release
* Wed Apr 30 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-3.20140430 * Wed Apr 30 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-3.20140430
- Update to today snapshot - Update to today snapshot
- apply as downstream patches for reporting GPU max frequency on r600 (FD.o #73511) - apply as downstream patches for reporting GPU max frequency on r600 (FD.o #73511)

54
radeonsi-llvm-version-hack.patch
View File

@ -1,7 +1,8 @@
diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c.radeonsi mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
--- mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c.radeonsi 2014-03-18 04:37:30.009681609 +0000 index 0c58d5f..7922f10 100644
+++ mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c 2014-03-18 04:37:36.751681788 +0000 --- a/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -151,7 +151,7 @@ static void si_update_descriptors(struct +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -152,7 +152,7 @@ static void si_update_descriptors(struct si_context *sctx,
7 + /* copy */ 7 + /* copy */
(4 + desc->element_dw_size) * util_bitcount(desc->dirty_mask) + /* update */ (4 + desc->element_dw_size) * util_bitcount(desc->dirty_mask) + /* update */
4; /* pointer update */ 4; /* pointer update */
@ -10,7 +11,7 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c.radeonsi me
if (desc->shader_userdata_reg >= R_00B130_SPI_SHADER_USER_DATA_VS_0 && if (desc->shader_userdata_reg >= R_00B130_SPI_SHADER_USER_DATA_VS_0 &&
desc->shader_userdata_reg < R_00B230_SPI_SHADER_USER_DATA_GS_0) desc->shader_userdata_reg < R_00B230_SPI_SHADER_USER_DATA_GS_0)
desc->atom.num_dw += 4; /* second pointer update */ desc->atom.num_dw += 4; /* second pointer update */
@@ -176,7 +176,7 @@ static void si_emit_shader_pointer(struc @@ -177,7 +177,7 @@ static void si_emit_shader_pointer(struct si_context *sctx,
radeon_emit(cs, va); radeon_emit(cs, va);
radeon_emit(cs, va >> 32); radeon_emit(cs, va >> 32);
@ -19,28 +20,20 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_descriptors.c.radeonsi me
if (desc->shader_userdata_reg >= R_00B130_SPI_SHADER_USER_DATA_VS_0 && if (desc->shader_userdata_reg >= R_00B130_SPI_SHADER_USER_DATA_VS_0 &&
desc->shader_userdata_reg < R_00B230_SPI_SHADER_USER_DATA_GS_0) { desc->shader_userdata_reg < R_00B230_SPI_SHADER_USER_DATA_GS_0) {
radeon_emit(cs, PKT3(PKT3_SET_SH_REG, 2, 0)); radeon_emit(cs, PKT3(PKT3_SET_SH_REG, 2, 0));
diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_pipe.c.radeonsi mesa-20140305/src/gallium/drivers/radeonsi/si_pipe.c diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
--- mesa-20140305/src/gallium/drivers/radeonsi/si_pipe.c.radeonsi 2014-03-05 06:59:46.000000000 +0000 index 873115b..3f23ff1 100644
+++ mesa-20140305/src/gallium/drivers/radeonsi/si_pipe.c 2014-03-18 04:37:10.090681081 +0000 --- a/src/gallium/drivers/radeonsi/si_pipe.c
@@ -269,7 +269,7 @@ static int si_get_param(struct pipe_scre +++ b/src/gallium/drivers/radeonsi/si_pipe.c
return 256; @@ -224,7 +224,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 4;
case PIPE_CAP_GLSL_FEATURE_LEVEL: case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return HAVE_LLVM >= 0x0305 ? 330 : 140; - return HAVE_LLVM >= 0x0305 ? 330 : 140;
+ return HAVE_LLVM >= 0x0304 ? 330 : 140; + return HAVE_LLVM >= 0x0304 ? 330 : 140;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return 1; return MIN2(sscreen->b.info.vram_size, 0xFFFFFFFF);
@@ -313,7 +313,7 @@ static int si_get_param(struct pipe_scre @@ -308,7 +308,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return 16384;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return HAVE_LLVM >= 0x0305 ? 48 : 32;
+ return HAVE_LLVM >= 0x0304 ? 48 : 32;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
@@ -346,7 +346,7 @@ static int si_get_shader_param(struct pi
case PIPE_SHADER_VERTEX: case PIPE_SHADER_VERTEX:
break; break;
case PIPE_SHADER_GEOMETRY: case PIPE_SHADER_GEOMETRY:
@ -49,10 +42,11 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_pipe.c.radeonsi mesa-2014
return 0; return 0;
#endif #endif
break; break;
diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi mesa-20140305/src/gallium/drivers/radeonsi/si_state.c diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
--- mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi 2014-03-05 06:59:46.000000000 +0000 index 6d5408b..1434986 100644
+++ mesa-20140305/src/gallium/drivers/radeonsi/si_state.c 2014-03-18 04:37:10.092681081 +0000 --- a/src/gallium/drivers/radeonsi/si_state.c
@@ -2307,7 +2307,7 @@ static void *si_create_fs_state(struct p +++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2173,7 +2173,7 @@ static void *si_create_fs_state(struct pipe_context *ctx,
return si_create_shader_state(ctx, state, PIPE_SHADER_FRAGMENT); return si_create_shader_state(ctx, state, PIPE_SHADER_FRAGMENT);
} }
@ -61,7 +55,7 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi mesa-201
static void *si_create_gs_state(struct pipe_context *ctx, static void *si_create_gs_state(struct pipe_context *ctx,
const struct pipe_shader_state *state) const struct pipe_shader_state *state)
@@ -2337,7 +2337,7 @@ static void si_bind_vs_shader(struct pip @@ -2203,7 +2203,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
sctx->vs_shader = sel; sctx->vs_shader = sel;
} }
@ -70,7 +64,7 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi mesa-201
static void si_bind_gs_shader(struct pipe_context *ctx, void *state) static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
{ {
@@ -2396,7 +2396,7 @@ static void si_delete_vs_shader(struct p @@ -2271,7 +2271,7 @@ static void si_delete_vs_shader(struct pipe_context *ctx, void *state)
si_delete_shader_selector(ctx, sel); si_delete_shader_selector(ctx, sel);
} }
@ -79,7 +73,7 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi mesa-201
static void si_delete_gs_shader(struct pipe_context *ctx, void *state) static void si_delete_gs_shader(struct pipe_context *ctx, void *state)
{ {
@@ -2890,7 +2890,7 @@ static void si_bind_vs_sampler_states(st @@ -2767,7 +2767,7 @@ static void si_bind_vs_sampler_states(struct pipe_context *ctx, unsigned count,
si_set_sampler_states(sctx, pm4, count, states, si_set_sampler_states(sctx, pm4, count, states,
&sctx->samplers[PIPE_SHADER_VERTEX], &sctx->samplers[PIPE_SHADER_VERTEX],
R_00B130_SPI_SHADER_USER_DATA_VS_0); R_00B130_SPI_SHADER_USER_DATA_VS_0);
@ -88,7 +82,7 @@ diff -up mesa-20140305/src/gallium/drivers/radeonsi/si_state.c.radeonsi mesa-201
si_set_sampler_states(sctx, pm4, count, states, si_set_sampler_states(sctx, pm4, count, states,
&sctx->samplers[PIPE_SHADER_VERTEX], &sctx->samplers[PIPE_SHADER_VERTEX],
R_00B330_SPI_SHADER_USER_DATA_ES_0); R_00B330_SPI_SHADER_USER_DATA_ES_0);
@@ -3166,7 +3166,7 @@ void si_init_state_functions(struct si_c @@ -2999,7 +2999,7 @@ void si_init_state_functions(struct si_context *sctx)
sctx->b.b.bind_fs_state = si_bind_ps_shader; sctx->b.b.bind_fs_state = si_bind_ps_shader;
sctx->b.b.delete_vs_state = si_delete_vs_shader; sctx->b.b.delete_vs_state = si_delete_vs_shader;
sctx->b.b.delete_fs_state = si_delete_ps_shader; sctx->b.b.delete_fs_state = si_delete_ps_shader;

2
sources
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@ -1 +1 @@
e53a42d8ba8ebb7d07f5781763f9903d mesa-20140430.tar.xz 3d183463945f084ea364df164389cff6 mesa-20140505.tar.xz