74 lines
2.7 KiB
Diff
74 lines
2.7 KiB
Diff
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From 0a41054b7faa9df4e4b8802f646a7e078389eb89 Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Fri, 18 Apr 2014 16:28:40 +0200
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Subject: [PATCH 2/3] radeon/compute: Implement
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PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Igor Gnatenko:
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v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)
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Bruno Jiménez:
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v3: Convert the frequency to MHz from kHz after getting it in
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'do_winsys_init'
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Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
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Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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---
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src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++++++
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src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++++
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src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
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3 files changed, 13 insertions(+)
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diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
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index 7508865..957186a 100644
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--- a/src/gallium/drivers/radeon/r600_pipe_common.c
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+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
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@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen *screen,
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}
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return sizeof(uint64_t);
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+ case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
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+ if (ret) {
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+ uint32_t *max_clock_frequency = ret;
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+ *max_clock_frequency = rscreen->info.max_sclk;
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+ }
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+ return sizeof(uint32_t);
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+
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default:
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fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
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return 0;
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diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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index b53beba..7618316 100644
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--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
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ws->info.gart_size = gem_info.gart_size;
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ws->info.vram_size = gem_info.vram_size;
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+ /* Get max clock frequency info and convert it to MHz */
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+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
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+ &ws->info.max_sclk);
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+ ws->info.max_sclk /= 1000;
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+
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ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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/* Generation-specific queries. */
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diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
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index fe0617b..1cb17bb 100644
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--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
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+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
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@@ -196,6 +196,7 @@ struct radeon_info {
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enum chip_class chip_class;
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uint32_t gart_size;
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uint32_t vram_size;
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+ uint32_t max_sclk;
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uint32_t drm_major; /* version */
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uint32_t drm_minor;
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--
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1.9.0
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