forked from rpms/glibc
668eaab0c7
* Fri Jul 22 2022 Arjun Shankar <arjun@redhat.com> - 2.34-40
- Sync with upstream branch release/2.34/master,
commit b2f32e746492615a6eb3e66fac1e766e32e8deb1:
- malloc: Simplify implementation of __malloc_assert
- Update syscall-names.list for Linux 5.18
- x86: Add missing IS_IN (libc) check to strncmp-sse4_2.S
- x86: Move mem{p}{mov|cpy}_{chk_}erms to its own file
- x86: Move and slightly improve memset_erms
- x86: Add definition for __wmemset_chk AVX2 RTM in ifunc impl list
- x86: Put wcs{n}len-sse4.1 in the sse4.1 text section
- x86: Align entry for memrchr to 64-bytes.
- x86: Add BMI1/BMI2 checks for ISA_V3 check
- x86: Cleanup bounds checking in large memcpy case
- x86: Add bounds `x86_non_temporal_threshold`
- x86: Add sse42 implementation to strcmp's ifunc
- x86: Fix misordered logic for setting `rep_movsb_stop_threshold`
- x86: Align varshift table to 32-bytes
- x86: ZERO_UPPER_VEC_REGISTERS_RETURN_XTEST expect no transactions
- x86: Shrink code size of memchr-evex.S
- x86: Shrink code size of memchr-avx2.S
- x86: Optimize memrchr-avx2.S
- x86: Optimize memrchr-evex.S
- x86: Optimize memrchr-sse2.S
- x86: Add COND_VZEROUPPER that can replace vzeroupper if no `ret`
- x86: Create header for VEC classes in x86 strings library
- x86_64: Add strstr function with 512-bit EVEX
- x86-64: Ignore r_addend for R_X86_64_GLOB_DAT/R_X86_64_JUMP_SLOT
- x86_64: Implement evex512 version of strlen, strnlen, wcslen and wcsnlen
- x86_64: Remove bzero optimization
- x86_64: Remove end of line trailing spaces
- nptl: Fix ___pthread_unregister_cancel_restore asynchronous restore
- linux: Fix mq_timereceive check for 32 bit fallback code (BZ 29304)
Resolves: #2109505
89 lines
3.3 KiB
Diff
89 lines
3.3 KiB
Diff
commit ba1c3f23d9ba63c38333116eec6043c471c378c4
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Author: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Wed Jun 15 10:41:28 2022 -0700
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x86: Cleanup bounds checking in large memcpy case
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1. Fix incorrect lower-bound threshold in L(large_memcpy_2x).
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Previously was using `__x86_rep_movsb_threshold` and should
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have been using `__x86_shared_non_temporal_threshold`.
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2. Avoid reloading __x86_shared_non_temporal_threshold before
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the L(large_memcpy_4x) bounds check.
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3. Document the second bounds check for L(large_memcpy_4x)
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more clearly.
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(cherry picked from commit 89a25c6f64746732b87eaf433af0964b564d4a92)
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diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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index 7b27cbdda5fb99f7..618d46d8ce28828c 100644
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--- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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@@ -118,7 +118,13 @@
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# define LARGE_LOAD_SIZE (VEC_SIZE * 4)
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#endif
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-/* Amount to shift rdx by to compare for memcpy_large_4x. */
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+/* Amount to shift __x86_shared_non_temporal_threshold by for
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+ bound for memcpy_large_4x. This is essentially use to to
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+ indicate that the copy is far beyond the scope of L3
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+ (assuming no user config x86_non_temporal_threshold) and to
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+ use a more aggressively unrolled loop. NB: before
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+ increasing the value also update initialization of
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+ x86_non_temporal_threshold. */
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#ifndef LOG_4X_MEMCPY_THRESH
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# define LOG_4X_MEMCPY_THRESH 4
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#endif
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@@ -724,9 +730,14 @@ L(skip_short_movsb_check):
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.p2align 4,, 10
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#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc)
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L(large_memcpy_2x_check):
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- cmp __x86_rep_movsb_threshold(%rip), %RDX_LP
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- jb L(more_8x_vec_check)
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+ /* Entry from L(large_memcpy_2x) has a redundant load of
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+ __x86_shared_non_temporal_threshold(%rip). L(large_memcpy_2x)
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+ is only use for the non-erms memmove which is generally less
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+ common. */
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L(large_memcpy_2x):
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+ mov __x86_shared_non_temporal_threshold(%rip), %R11_LP
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+ cmp %R11_LP, %RDX_LP
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+ jb L(more_8x_vec_check)
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/* To reach this point it is impossible for dst > src and
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overlap. Remaining to check is src > dst and overlap. rcx
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already contains dst - src. Negate rcx to get src - dst. If
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@@ -774,18 +785,21 @@ L(large_memcpy_2x):
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/* ecx contains -(dst - src). not ecx will return dst - src - 1
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which works for testing aliasing. */
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notl %ecx
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+ movq %rdx, %r10
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testl $(PAGE_SIZE - VEC_SIZE * 8), %ecx
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jz L(large_memcpy_4x)
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- movq %rdx, %r10
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- shrq $LOG_4X_MEMCPY_THRESH, %r10
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- cmp __x86_shared_non_temporal_threshold(%rip), %r10
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+ /* r11 has __x86_shared_non_temporal_threshold. Shift it left
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+ by LOG_4X_MEMCPY_THRESH to get L(large_memcpy_4x) threshold.
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+ */
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+ shlq $LOG_4X_MEMCPY_THRESH, %r11
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+ cmp %r11, %rdx
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jae L(large_memcpy_4x)
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/* edx will store remainder size for copying tail. */
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andl $(PAGE_SIZE * 2 - 1), %edx
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/* r10 stores outer loop counter. */
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- shrq $((LOG_PAGE_SIZE + 1) - LOG_4X_MEMCPY_THRESH), %r10
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+ shrq $(LOG_PAGE_SIZE + 1), %r10
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/* Copy 4x VEC at a time from 2 pages. */
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.p2align 4
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L(loop_large_memcpy_2x_outer):
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@@ -850,7 +864,6 @@ L(large_memcpy_2x_end):
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.p2align 4
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L(large_memcpy_4x):
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- movq %rdx, %r10
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/* edx will store remainder size for copying tail. */
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andl $(PAGE_SIZE * 4 - 1), %edx
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/* r10 stores outer loop counter. */
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