forked from rpms/glibc
668eaab0c7
* Fri Jul 22 2022 Arjun Shankar <arjun@redhat.com> - 2.34-40
- Sync with upstream branch release/2.34/master,
commit b2f32e746492615a6eb3e66fac1e766e32e8deb1:
- malloc: Simplify implementation of __malloc_assert
- Update syscall-names.list for Linux 5.18
- x86: Add missing IS_IN (libc) check to strncmp-sse4_2.S
- x86: Move mem{p}{mov|cpy}_{chk_}erms to its own file
- x86: Move and slightly improve memset_erms
- x86: Add definition for __wmemset_chk AVX2 RTM in ifunc impl list
- x86: Put wcs{n}len-sse4.1 in the sse4.1 text section
- x86: Align entry for memrchr to 64-bytes.
- x86: Add BMI1/BMI2 checks for ISA_V3 check
- x86: Cleanup bounds checking in large memcpy case
- x86: Add bounds `x86_non_temporal_threshold`
- x86: Add sse42 implementation to strcmp's ifunc
- x86: Fix misordered logic for setting `rep_movsb_stop_threshold`
- x86: Align varshift table to 32-bytes
- x86: ZERO_UPPER_VEC_REGISTERS_RETURN_XTEST expect no transactions
- x86: Shrink code size of memchr-evex.S
- x86: Shrink code size of memchr-avx2.S
- x86: Optimize memrchr-avx2.S
- x86: Optimize memrchr-evex.S
- x86: Optimize memrchr-sse2.S
- x86: Add COND_VZEROUPPER that can replace vzeroupper if no `ret`
- x86: Create header for VEC classes in x86 strings library
- x86_64: Add strstr function with 512-bit EVEX
- x86-64: Ignore r_addend for R_X86_64_GLOB_DAT/R_X86_64_JUMP_SLOT
- x86_64: Implement evex512 version of strlen, strnlen, wcslen and wcsnlen
- x86_64: Remove bzero optimization
- x86_64: Remove end of line trailing spaces
- nptl: Fix ___pthread_unregister_cancel_restore asynchronous restore
- linux: Fix mq_timereceive check for 32 bit fallback code (BZ 29304)
Resolves: #2109505
646 lines
15 KiB
Diff
646 lines
15 KiB
Diff
commit b05bd59823bcedee281d3fd5bd4928698ea9d69d
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Author: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Mon Jun 6 21:11:32 2022 -0700
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x86: Optimize memrchr-avx2.S
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The new code:
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1. prioritizes smaller user-arg lengths more.
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2. optimizes target placement more carefully
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3. reuses logic more
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4. fixes up various inefficiencies in the logic. The biggest
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case here is the `lzcnt` logic for checking returns which
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saves either a branch or multiple instructions.
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The total code size saving is: 306 bytes
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Geometric Mean of all benchmarks New / Old: 0.760
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Regressions:
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There are some regressions. Particularly where the length (user arg
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length) is large but the position of the match char is near the
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beginning of the string (in first VEC). This case has roughly a
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10-20% regression.
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This is because the new logic gives the hot path for immediate matches
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to shorter lengths (the more common input). This case has roughly
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a 15-45% speedup.
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Full xcheck passes on x86_64.
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Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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(cherry picked from commit af5306a735eb0966fdc2f8ccdafa8888e2df0c87)
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diff --git a/sysdeps/x86_64/multiarch/memrchr-avx2-rtm.S b/sysdeps/x86_64/multiarch/memrchr-avx2-rtm.S
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index cea2d2a72db7406a..5e9beeeef2677c9f 100644
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--- a/sysdeps/x86_64/multiarch/memrchr-avx2-rtm.S
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+++ b/sysdeps/x86_64/multiarch/memrchr-avx2-rtm.S
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@@ -2,6 +2,7 @@
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# define MEMRCHR __memrchr_avx2_rtm
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#endif
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+#define COND_VZEROUPPER COND_VZEROUPPER_XTEST
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#define ZERO_UPPER_VEC_REGISTERS_RETURN \
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ZERO_UPPER_VEC_REGISTERS_RETURN_XTEST
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diff --git a/sysdeps/x86_64/multiarch/memrchr-avx2.S b/sysdeps/x86_64/multiarch/memrchr-avx2.S
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index ac7370cb06e9a0fd..5f8e0be18cfe4fad 100644
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--- a/sysdeps/x86_64/multiarch/memrchr-avx2.S
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+++ b/sysdeps/x86_64/multiarch/memrchr-avx2.S
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@@ -21,340 +21,318 @@
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# include <sysdep.h>
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# ifndef MEMRCHR
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-# define MEMRCHR __memrchr_avx2
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+# define MEMRCHR __memrchr_avx2
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# endif
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# ifndef VZEROUPPER
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-# define VZEROUPPER vzeroupper
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+# define VZEROUPPER vzeroupper
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# endif
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# ifndef SECTION
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# define SECTION(p) p##.avx
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# endif
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-# define VEC_SIZE 32
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+# define VEC_SIZE 32
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+# define PAGE_SIZE 4096
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+ .section SECTION(.text), "ax", @progbits
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+ENTRY(MEMRCHR)
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+# ifdef __ILP32__
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+ /* Clear upper bits. */
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+ and %RDX_LP, %RDX_LP
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+# else
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+ test %RDX_LP, %RDX_LP
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+# endif
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+ jz L(zero_0)
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- .section SECTION(.text),"ax",@progbits
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-ENTRY (MEMRCHR)
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- /* Broadcast CHAR to YMM0. */
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vmovd %esi, %xmm0
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- vpbroadcastb %xmm0, %ymm0
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-
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- sub $VEC_SIZE, %RDX_LP
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- jbe L(last_vec_or_less)
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-
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- add %RDX_LP, %RDI_LP
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-
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- /* Check the last VEC_SIZE bytes. */
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- vpcmpeqb (%rdi), %ymm0, %ymm1
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- vpmovmskb %ymm1, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x0)
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+ /* Get end pointer. Minus one for two reasons. 1) It is necessary for a
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+ correct page cross check and 2) it correctly sets up end ptr to be
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+ subtract by lzcnt aligned. */
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+ leaq -1(%rdx, %rdi), %rax
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- subq $(VEC_SIZE * 4), %rdi
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- movl %edi, %ecx
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- andl $(VEC_SIZE - 1), %ecx
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- jz L(aligned_more)
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+ vpbroadcastb %xmm0, %ymm0
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- /* Align data for aligned loads in the loop. */
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- addq $VEC_SIZE, %rdi
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- addq $VEC_SIZE, %rdx
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- andq $-VEC_SIZE, %rdi
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- subq %rcx, %rdx
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+ /* Check if we can load 1x VEC without cross a page. */
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+ testl $(PAGE_SIZE - VEC_SIZE), %eax
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+ jz L(page_cross)
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+
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+ vpcmpeqb -(VEC_SIZE - 1)(%rax), %ymm0, %ymm1
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+ vpmovmskb %ymm1, %ecx
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+ cmpq $VEC_SIZE, %rdx
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+ ja L(more_1x_vec)
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+
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+L(ret_vec_x0_test):
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+ /* If ecx is zero (no matches) lzcnt will set it 32 (VEC_SIZE) which
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+ will gurantee edx (len) is less than it. */
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+ lzcntl %ecx, %ecx
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+
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+ /* Hoist vzeroupper (not great for RTM) to save code size. This allows
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+ all logic for edx (len) <= VEC_SIZE to fit in first cache line. */
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+ COND_VZEROUPPER
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+ cmpl %ecx, %edx
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+ jle L(zero_0)
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+ subq %rcx, %rax
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+ ret
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- .p2align 4
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-L(aligned_more):
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- subq $(VEC_SIZE * 4), %rdx
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- jbe L(last_4x_vec_or_less)
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-
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- /* Check the last 4 * VEC_SIZE. Only one VEC_SIZE at a time
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- since data is only aligned to VEC_SIZE. */
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- vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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- vpmovmskb %ymm1, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x3)
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-
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- vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm2
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- vpmovmskb %ymm2, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x2)
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-
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- vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm3
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- vpmovmskb %ymm3, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x1)
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-
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- vpcmpeqb (%rdi), %ymm0, %ymm4
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- vpmovmskb %ymm4, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x0)
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-
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- /* Align data to 4 * VEC_SIZE for loop with fewer branches.
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- There are some overlaps with above if data isn't aligned
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- to 4 * VEC_SIZE. */
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- movl %edi, %ecx
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- andl $(VEC_SIZE * 4 - 1), %ecx
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- jz L(loop_4x_vec)
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-
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- addq $(VEC_SIZE * 4), %rdi
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- addq $(VEC_SIZE * 4), %rdx
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- andq $-(VEC_SIZE * 4), %rdi
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- subq %rcx, %rdx
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+ /* Fits in aligning bytes of first cache line. */
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+L(zero_0):
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+ xorl %eax, %eax
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+ ret
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- .p2align 4
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-L(loop_4x_vec):
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- /* Compare 4 * VEC at a time forward. */
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- subq $(VEC_SIZE * 4), %rdi
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- subq $(VEC_SIZE * 4), %rdx
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- jbe L(last_4x_vec_or_less)
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-
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- vmovdqa (%rdi), %ymm1
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- vmovdqa VEC_SIZE(%rdi), %ymm2
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- vmovdqa (VEC_SIZE * 2)(%rdi), %ymm3
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- vmovdqa (VEC_SIZE * 3)(%rdi), %ymm4
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-
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- vpcmpeqb %ymm1, %ymm0, %ymm1
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- vpcmpeqb %ymm2, %ymm0, %ymm2
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- vpcmpeqb %ymm3, %ymm0, %ymm3
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- vpcmpeqb %ymm4, %ymm0, %ymm4
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-
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- vpor %ymm1, %ymm2, %ymm5
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- vpor %ymm3, %ymm4, %ymm6
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- vpor %ymm5, %ymm6, %ymm5
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-
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- vpmovmskb %ymm5, %eax
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- testl %eax, %eax
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- jz L(loop_4x_vec)
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-
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- /* There is a match. */
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- vpmovmskb %ymm4, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x3)
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-
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- vpmovmskb %ymm3, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x2)
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-
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- vpmovmskb %ymm2, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x1)
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-
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- vpmovmskb %ymm1, %eax
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- bsrl %eax, %eax
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- addq %rdi, %rax
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+ .p2align 4,, 9
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+L(ret_vec_x0):
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+ lzcntl %ecx, %ecx
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+ subq %rcx, %rax
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L(return_vzeroupper):
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ZERO_UPPER_VEC_REGISTERS_RETURN
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- .p2align 4
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-L(last_4x_vec_or_less):
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- addl $(VEC_SIZE * 4), %edx
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- cmpl $(VEC_SIZE * 2), %edx
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- jbe L(last_2x_vec)
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-
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- vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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- vpmovmskb %ymm1, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x3)
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-
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- vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm2
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- vpmovmskb %ymm2, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x2)
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-
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- vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm3
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- vpmovmskb %ymm3, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x1_check)
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- cmpl $(VEC_SIZE * 3), %edx
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- jbe L(zero)
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-
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- vpcmpeqb (%rdi), %ymm0, %ymm4
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- vpmovmskb %ymm4, %eax
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- testl %eax, %eax
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- jz L(zero)
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- bsrl %eax, %eax
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- subq $(VEC_SIZE * 4), %rdx
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- addq %rax, %rdx
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- jl L(zero)
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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-
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- .p2align 4
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+ .p2align 4,, 10
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+L(more_1x_vec):
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+ testl %ecx, %ecx
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+ jnz L(ret_vec_x0)
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+
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+ /* Align rax (string pointer). */
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+ andq $-VEC_SIZE, %rax
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+
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+ /* Recompute remaining length after aligning. */
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+ movq %rax, %rdx
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+ /* Need this comparison next no matter what. */
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+ vpcmpeqb -(VEC_SIZE)(%rax), %ymm0, %ymm1
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+ subq %rdi, %rdx
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+ decq %rax
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+ vpmovmskb %ymm1, %ecx
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+ /* Fall through for short (hotter than length). */
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+ cmpq $(VEC_SIZE * 2), %rdx
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+ ja L(more_2x_vec)
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L(last_2x_vec):
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- vpcmpeqb (VEC_SIZE * 3)(%rdi), %ymm0, %ymm1
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- vpmovmskb %ymm1, %eax
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- testl %eax, %eax
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- jnz L(last_vec_x3_check)
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cmpl $VEC_SIZE, %edx
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- jbe L(zero)
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-
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- vpcmpeqb (VEC_SIZE * 2)(%rdi), %ymm0, %ymm1
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- vpmovmskb %ymm1, %eax
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- testl %eax, %eax
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- jz L(zero)
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- bsrl %eax, %eax
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- subq $(VEC_SIZE * 2), %rdx
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- addq %rax, %rdx
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- jl L(zero)
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- addl $(VEC_SIZE * 2), %eax
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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-
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- .p2align 4
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-L(last_vec_x0):
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- bsrl %eax, %eax
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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+ jbe L(ret_vec_x0_test)
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+
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+ testl %ecx, %ecx
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+ jnz L(ret_vec_x0)
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+
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+ vpcmpeqb -(VEC_SIZE * 2 - 1)(%rax), %ymm0, %ymm1
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+ vpmovmskb %ymm1, %ecx
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+ /* 64-bit lzcnt. This will naturally add 32 to position. */
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+ lzcntq %rcx, %rcx
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+ COND_VZEROUPPER
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+ cmpl %ecx, %edx
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+ jle L(zero_0)
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+ subq %rcx, %rax
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+ ret
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- .p2align 4
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-L(last_vec_x1):
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- bsrl %eax, %eax
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- addl $VEC_SIZE, %eax
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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- .p2align 4
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-L(last_vec_x2):
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- bsrl %eax, %eax
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- addl $(VEC_SIZE * 2), %eax
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- addq %rdi, %rax
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+ /* Inexpensive place to put this regarding code size / target alignments
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+ / ICache NLP. Necessary for 2-byte encoding of jump to page cross
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+ case which in turn is necessary for hot path (len <= VEC_SIZE) to fit
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+ in first cache line. */
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+L(page_cross):
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+ movq %rax, %rsi
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+ andq $-VEC_SIZE, %rsi
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+ vpcmpeqb (%rsi), %ymm0, %ymm1
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+ vpmovmskb %ymm1, %ecx
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+ /* Shift out negative alignment (because we are starting from endptr and
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+ working backwards). */
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+ movl %eax, %r8d
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+ /* notl because eax already has endptr - 1. (-x = ~(x - 1)). */
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+ notl %r8d
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+ shlxl %r8d, %ecx, %ecx
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+ cmpq %rdi, %rsi
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+ ja L(more_1x_vec)
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+ lzcntl %ecx, %ecx
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+ COND_VZEROUPPER
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+ cmpl %ecx, %edx
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+ jle L(zero_0)
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+ subq %rcx, %rax
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+ ret
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+ .p2align 4,, 11
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+L(ret_vec_x1):
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+ /* This will naturally add 32 to position. */
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+ lzcntq %rcx, %rcx
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+ subq %rcx, %rax
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VZEROUPPER_RETURN
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+ .p2align 4,, 10
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+L(more_2x_vec):
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+ testl %ecx, %ecx
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+ jnz L(ret_vec_x0)
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- .p2align 4
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-L(last_vec_x3):
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- bsrl %eax, %eax
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- addl $(VEC_SIZE * 3), %eax
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- addq %rdi, %rax
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- ret
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+ vpcmpeqb -(VEC_SIZE * 2 - 1)(%rax), %ymm0, %ymm1
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+ vpmovmskb %ymm1, %ecx
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+ testl %ecx, %ecx
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+ jnz L(ret_vec_x1)
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- .p2align 4
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-L(last_vec_x1_check):
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- bsrl %eax, %eax
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- subq $(VEC_SIZE * 3), %rdx
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- addq %rax, %rdx
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- jl L(zero)
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- addl $VEC_SIZE, %eax
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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- .p2align 4
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-L(last_vec_x3_check):
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- bsrl %eax, %eax
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- subq $VEC_SIZE, %rdx
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- addq %rax, %rdx
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- jl L(zero)
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- addl $(VEC_SIZE * 3), %eax
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- addq %rdi, %rax
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- VZEROUPPER_RETURN
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+ /* Needed no matter what. */
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+ vpcmpeqb -(VEC_SIZE * 3 - 1)(%rax), %ymm0, %ymm1
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+ vpmovmskb %ymm1, %ecx
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- .p2align 4
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-L(zero):
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- xorl %eax, %eax
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- VZEROUPPER_RETURN
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+ subq $(VEC_SIZE * 4), %rdx
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+ ja L(more_4x_vec)
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+
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+ cmpl $(VEC_SIZE * -1), %edx
|
|
+ jle L(ret_vec_x2_test)
|
|
+
|
|
+L(last_vec):
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x2)
|
|
+
|
|
+ /* Needed no matter what. */
|
|
+ vpcmpeqb -(VEC_SIZE * 4 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpmovmskb %ymm1, %ecx
|
|
+ lzcntl %ecx, %ecx
|
|
+ subq $(VEC_SIZE * 3), %rax
|
|
+ COND_VZEROUPPER
|
|
+ subq %rcx, %rax
|
|
+ cmpq %rax, %rdi
|
|
+ ja L(zero_2)
|
|
+ ret
|
|
|
|
- .p2align 4
|
|
-L(null):
|
|
+ /* First in aligning bytes. */
|
|
+L(zero_2):
|
|
xorl %eax, %eax
|
|
ret
|
|
|
|
- .p2align 4
|
|
-L(last_vec_or_less_aligned):
|
|
- movl %edx, %ecx
|
|
+ .p2align 4,, 4
|
|
+L(ret_vec_x2_test):
|
|
+ lzcntl %ecx, %ecx
|
|
+ subq $(VEC_SIZE * 2), %rax
|
|
+ COND_VZEROUPPER
|
|
+ subq %rcx, %rax
|
|
+ cmpq %rax, %rdi
|
|
+ ja L(zero_2)
|
|
+ ret
|
|
|
|
- vpcmpeqb (%rdi), %ymm0, %ymm1
|
|
|
|
- movl $1, %edx
|
|
- /* Support rdx << 32. */
|
|
- salq %cl, %rdx
|
|
- subq $1, %rdx
|
|
+ .p2align 4,, 11
|
|
+L(ret_vec_x2):
|
|
+ /* ecx must be non-zero. */
|
|
+ bsrl %ecx, %ecx
|
|
+ leaq (VEC_SIZE * -3 + 1)(%rcx, %rax), %rax
|
|
+ VZEROUPPER_RETURN
|
|
|
|
- vpmovmskb %ymm1, %eax
|
|
+ .p2align 4,, 14
|
|
+L(ret_vec_x3):
|
|
+ /* ecx must be non-zero. */
|
|
+ bsrl %ecx, %ecx
|
|
+ leaq (VEC_SIZE * -4 + 1)(%rcx, %rax), %rax
|
|
+ VZEROUPPER_RETURN
|
|
|
|
- /* Remove the trailing bytes. */
|
|
- andl %edx, %eax
|
|
- testl %eax, %eax
|
|
- jz L(zero)
|
|
|
|
- bsrl %eax, %eax
|
|
- addq %rdi, %rax
|
|
- VZEROUPPER_RETURN
|
|
|
|
.p2align 4
|
|
-L(last_vec_or_less):
|
|
- addl $VEC_SIZE, %edx
|
|
+L(more_4x_vec):
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x2)
|
|
|
|
- /* Check for zero length. */
|
|
- testl %edx, %edx
|
|
- jz L(null)
|
|
+ vpcmpeqb -(VEC_SIZE * 4 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpmovmskb %ymm1, %ecx
|
|
|
|
- movl %edi, %ecx
|
|
- andl $(VEC_SIZE - 1), %ecx
|
|
- jz L(last_vec_or_less_aligned)
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x3)
|
|
|
|
- movl %ecx, %esi
|
|
- movl %ecx, %r8d
|
|
- addl %edx, %esi
|
|
- andq $-VEC_SIZE, %rdi
|
|
+ /* Check if near end before re-aligning (otherwise might do an
|
|
+ unnecissary loop iteration). */
|
|
+ addq $-(VEC_SIZE * 4), %rax
|
|
+ cmpq $(VEC_SIZE * 4), %rdx
|
|
+ jbe L(last_4x_vec)
|
|
|
|
- subl $VEC_SIZE, %esi
|
|
- ja L(last_vec_2x_aligned)
|
|
+ /* Align rax to (VEC_SIZE - 1). */
|
|
+ orq $(VEC_SIZE * 4 - 1), %rax
|
|
+ movq %rdi, %rdx
|
|
+ /* Get endptr for loop in rdx. NB: Can't just do while rax > rdi because
|
|
+ lengths that overflow can be valid and break the comparison. */
|
|
+ orq $(VEC_SIZE * 4 - 1), %rdx
|
|
|
|
- /* Check the last VEC. */
|
|
- vpcmpeqb (%rdi), %ymm0, %ymm1
|
|
- vpmovmskb %ymm1, %eax
|
|
-
|
|
- /* Remove the leading and trailing bytes. */
|
|
- sarl %cl, %eax
|
|
- movl %edx, %ecx
|
|
+ .p2align 4
|
|
+L(loop_4x_vec):
|
|
+ /* Need this comparison next no matter what. */
|
|
+ vpcmpeqb -(VEC_SIZE * 1 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpcmpeqb -(VEC_SIZE * 2 - 1)(%rax), %ymm0, %ymm2
|
|
+ vpcmpeqb -(VEC_SIZE * 3 - 1)(%rax), %ymm0, %ymm3
|
|
+ vpcmpeqb -(VEC_SIZE * 4 - 1)(%rax), %ymm0, %ymm4
|
|
|
|
- movl $1, %edx
|
|
- sall %cl, %edx
|
|
- subl $1, %edx
|
|
+ vpor %ymm1, %ymm2, %ymm2
|
|
+ vpor %ymm3, %ymm4, %ymm4
|
|
+ vpor %ymm2, %ymm4, %ymm4
|
|
+ vpmovmskb %ymm4, %esi
|
|
|
|
- andl %edx, %eax
|
|
- testl %eax, %eax
|
|
- jz L(zero)
|
|
+ testl %esi, %esi
|
|
+ jnz L(loop_end)
|
|
|
|
- bsrl %eax, %eax
|
|
- addq %rdi, %rax
|
|
- addq %r8, %rax
|
|
- VZEROUPPER_RETURN
|
|
+ addq $(VEC_SIZE * -4), %rax
|
|
+ cmpq %rdx, %rax
|
|
+ jne L(loop_4x_vec)
|
|
|
|
- .p2align 4
|
|
-L(last_vec_2x_aligned):
|
|
- movl %esi, %ecx
|
|
+ subl %edi, %edx
|
|
+ incl %edx
|
|
|
|
- /* Check the last VEC. */
|
|
- vpcmpeqb VEC_SIZE(%rdi), %ymm0, %ymm1
|
|
+L(last_4x_vec):
|
|
+ /* Used no matter what. */
|
|
+ vpcmpeqb -(VEC_SIZE * 1 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpmovmskb %ymm1, %ecx
|
|
|
|
- movl $1, %edx
|
|
- sall %cl, %edx
|
|
- subl $1, %edx
|
|
+ cmpl $(VEC_SIZE * 2), %edx
|
|
+ jbe L(last_2x_vec)
|
|
|
|
- vpmovmskb %ymm1, %eax
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x0_end)
|
|
|
|
- /* Remove the trailing bytes. */
|
|
- andl %edx, %eax
|
|
+ vpcmpeqb -(VEC_SIZE * 2 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpmovmskb %ymm1, %ecx
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x1_end)
|
|
|
|
- testl %eax, %eax
|
|
- jnz L(last_vec_x1)
|
|
+ /* Used no matter what. */
|
|
+ vpcmpeqb -(VEC_SIZE * 3 - 1)(%rax), %ymm0, %ymm1
|
|
+ vpmovmskb %ymm1, %ecx
|
|
|
|
- /* Check the second last VEC. */
|
|
- vpcmpeqb (%rdi), %ymm0, %ymm1
|
|
+ cmpl $(VEC_SIZE * 3), %edx
|
|
+ ja L(last_vec)
|
|
+
|
|
+ lzcntl %ecx, %ecx
|
|
+ subq $(VEC_SIZE * 2), %rax
|
|
+ COND_VZEROUPPER
|
|
+ subq %rcx, %rax
|
|
+ cmpq %rax, %rdi
|
|
+ jbe L(ret0)
|
|
+ xorl %eax, %eax
|
|
+L(ret0):
|
|
+ ret
|
|
|
|
- movl %r8d, %ecx
|
|
|
|
- vpmovmskb %ymm1, %eax
|
|
+ .p2align 4
|
|
+L(loop_end):
|
|
+ vpmovmskb %ymm1, %ecx
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x0_end)
|
|
+
|
|
+ vpmovmskb %ymm2, %ecx
|
|
+ testl %ecx, %ecx
|
|
+ jnz L(ret_vec_x1_end)
|
|
+
|
|
+ vpmovmskb %ymm3, %ecx
|
|
+ /* Combine last 2 VEC matches. If ecx (VEC3) is zero (no CHAR in VEC3)
|
|
+ then it won't affect the result in esi (VEC4). If ecx is non-zero
|
|
+ then CHAR in VEC3 and bsrq will use that position. */
|
|
+ salq $32, %rcx
|
|
+ orq %rsi, %rcx
|
|
+ bsrq %rcx, %rcx
|
|
+ leaq (VEC_SIZE * -4 + 1)(%rcx, %rax), %rax
|
|
+ VZEROUPPER_RETURN
|
|
|
|
- /* Remove the leading bytes. Must use unsigned right shift for
|
|
- bsrl below. */
|
|
- shrl %cl, %eax
|
|
- testl %eax, %eax
|
|
- jz L(zero)
|
|
+ .p2align 4,, 4
|
|
+L(ret_vec_x1_end):
|
|
+ /* 64-bit version will automatically add 32 (VEC_SIZE). */
|
|
+ lzcntq %rcx, %rcx
|
|
+ subq %rcx, %rax
|
|
+ VZEROUPPER_RETURN
|
|
|
|
- bsrl %eax, %eax
|
|
- addq %rdi, %rax
|
|
- addq %r8, %rax
|
|
+ .p2align 4,, 4
|
|
+L(ret_vec_x0_end):
|
|
+ lzcntl %ecx, %ecx
|
|
+ subq %rcx, %rax
|
|
VZEROUPPER_RETURN
|
|
-END (MEMRCHR)
|
|
+
|
|
+ /* 2 bytes until next cache line. */
|
|
+END(MEMRCHR)
|
|
#endif
|