forked from rpms/glibc
668eaab0c7
* Fri Jul 22 2022 Arjun Shankar <arjun@redhat.com> - 2.34-40
- Sync with upstream branch release/2.34/master,
commit b2f32e746492615a6eb3e66fac1e766e32e8deb1:
- malloc: Simplify implementation of __malloc_assert
- Update syscall-names.list for Linux 5.18
- x86: Add missing IS_IN (libc) check to strncmp-sse4_2.S
- x86: Move mem{p}{mov|cpy}_{chk_}erms to its own file
- x86: Move and slightly improve memset_erms
- x86: Add definition for __wmemset_chk AVX2 RTM in ifunc impl list
- x86: Put wcs{n}len-sse4.1 in the sse4.1 text section
- x86: Align entry for memrchr to 64-bytes.
- x86: Add BMI1/BMI2 checks for ISA_V3 check
- x86: Cleanup bounds checking in large memcpy case
- x86: Add bounds `x86_non_temporal_threshold`
- x86: Add sse42 implementation to strcmp's ifunc
- x86: Fix misordered logic for setting `rep_movsb_stop_threshold`
- x86: Align varshift table to 32-bytes
- x86: ZERO_UPPER_VEC_REGISTERS_RETURN_XTEST expect no transactions
- x86: Shrink code size of memchr-evex.S
- x86: Shrink code size of memchr-avx2.S
- x86: Optimize memrchr-avx2.S
- x86: Optimize memrchr-evex.S
- x86: Optimize memrchr-sse2.S
- x86: Add COND_VZEROUPPER that can replace vzeroupper if no `ret`
- x86: Create header for VEC classes in x86 strings library
- x86_64: Add strstr function with 512-bit EVEX
- x86-64: Ignore r_addend for R_X86_64_GLOB_DAT/R_X86_64_JUMP_SLOT
- x86_64: Implement evex512 version of strlen, strnlen, wcslen and wcsnlen
- x86_64: Remove bzero optimization
- x86_64: Remove end of line trailing spaces
- nptl: Fix ___pthread_unregister_cancel_restore asynchronous restore
- linux: Fix mq_timereceive check for 32 bit fallback code (BZ 29304)
Resolves: #2109505
697 lines
14 KiB
Diff
697 lines
14 KiB
Diff
commit 4901009dad8b3ab141ac6e0caebe99e03a67f5eb
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Author: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Mon Jun 6 21:11:30 2022 -0700
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x86: Optimize memrchr-sse2.S
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The new code:
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1. prioritizes smaller lengths more.
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2. optimizes target placement more carefully.
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3. reuses logic more.
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4. fixes up various inefficiencies in the logic.
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The total code size saving is: 394 bytes
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Geometric Mean of all benchmarks New / Old: 0.874
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Regressions:
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1. The page cross case is now colder, especially re-entry from the
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page cross case if a match is not found in the first VEC
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(roughly 50%). My general opinion with this patch is this is
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acceptable given the "coldness" of this case (less than 4%) and
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generally performance improvement in the other far more common
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cases.
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2. There are some regressions 5-15% for medium/large user-arg
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lengths that have a match in the first VEC. This is because the
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logic was rewritten to optimize finds in the first VEC if the
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user-arg length is shorter (where we see roughly 20-50%
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performance improvements). It is not always the case this is a
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regression. My intuition is some frontend quirk is partially
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explaining the data although I haven't been able to find the
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root cause.
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Full xcheck passes on x86_64.
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Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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(cherry picked from commit 731feee3869550e93177e604604c1765d81de571)
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diff --git a/sysdeps/x86_64/memrchr.S b/sysdeps/x86_64/memrchr.S
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index cc2001167d77c83c..c2a5902bf9385c67 100644
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--- a/sysdeps/x86_64/memrchr.S
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+++ b/sysdeps/x86_64/memrchr.S
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@@ -19,362 +19,333 @@
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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+#define VEC_SIZE 16
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+#define PAGE_SIZE 4096
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.text
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-ENTRY (__memrchr)
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- movd %esi, %xmm1
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-
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- sub $16, %RDX_LP
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- jbe L(length_less16)
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-
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- punpcklbw %xmm1, %xmm1
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- punpcklbw %xmm1, %xmm1
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-
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- add %RDX_LP, %RDI_LP
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- pshufd $0, %xmm1, %xmm1
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-
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- movdqu (%rdi), %xmm0
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- pcmpeqb %xmm1, %xmm0
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-
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-/* Check if there is a match. */
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- pmovmskb %xmm0, %eax
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- test %eax, %eax
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- jnz L(matches0)
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-
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- sub $64, %rdi
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- mov %edi, %ecx
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- and $15, %ecx
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- jz L(loop_prolog)
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-
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- add $16, %rdi
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- add $16, %rdx
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- and $-16, %rdi
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- sub %rcx, %rdx
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-
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- .p2align 4
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-L(loop_prolog):
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- sub $64, %rdx
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- jbe L(exit_loop)
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-
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- movdqa 48(%rdi), %xmm0
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- pcmpeqb %xmm1, %xmm0
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- pmovmskb %xmm0, %eax
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- test %eax, %eax
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- jnz L(matches48)
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-
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- movdqa 32(%rdi), %xmm2
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- pcmpeqb %xmm1, %xmm2
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- pmovmskb %xmm2, %eax
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- test %eax, %eax
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- jnz L(matches32)
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-
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- movdqa 16(%rdi), %xmm3
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- pcmpeqb %xmm1, %xmm3
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- pmovmskb %xmm3, %eax
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- test %eax, %eax
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- jnz L(matches16)
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-
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- movdqa (%rdi), %xmm4
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- pcmpeqb %xmm1, %xmm4
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- pmovmskb %xmm4, %eax
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- test %eax, %eax
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- jnz L(matches0)
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-
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- sub $64, %rdi
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- sub $64, %rdx
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- jbe L(exit_loop)
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-
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- movdqa 48(%rdi), %xmm0
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- pcmpeqb %xmm1, %xmm0
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- pmovmskb %xmm0, %eax
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- test %eax, %eax
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- jnz L(matches48)
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-
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- movdqa 32(%rdi), %xmm2
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- pcmpeqb %xmm1, %xmm2
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- pmovmskb %xmm2, %eax
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- test %eax, %eax
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- jnz L(matches32)
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-
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- movdqa 16(%rdi), %xmm3
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- pcmpeqb %xmm1, %xmm3
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- pmovmskb %xmm3, %eax
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- test %eax, %eax
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- jnz L(matches16)
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-
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- movdqa (%rdi), %xmm3
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- pcmpeqb %xmm1, %xmm3
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- pmovmskb %xmm3, %eax
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- test %eax, %eax
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- jnz L(matches0)
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-
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- mov %edi, %ecx
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- and $63, %ecx
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- jz L(align64_loop)
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-
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- add $64, %rdi
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- add $64, %rdx
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- and $-64, %rdi
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- sub %rcx, %rdx
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-
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- .p2align 4
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-L(align64_loop):
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- sub $64, %rdi
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- sub $64, %rdx
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- jbe L(exit_loop)
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-
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- movdqa (%rdi), %xmm0
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- movdqa 16(%rdi), %xmm2
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- movdqa 32(%rdi), %xmm3
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- movdqa 48(%rdi), %xmm4
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-
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- pcmpeqb %xmm1, %xmm0
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- pcmpeqb %xmm1, %xmm2
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- pcmpeqb %xmm1, %xmm3
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- pcmpeqb %xmm1, %xmm4
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-
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- pmaxub %xmm3, %xmm0
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- pmaxub %xmm4, %xmm2
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- pmaxub %xmm0, %xmm2
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- pmovmskb %xmm2, %eax
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-
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- test %eax, %eax
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- jz L(align64_loop)
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-
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- pmovmskb %xmm4, %eax
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- test %eax, %eax
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- jnz L(matches48)
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-
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- pmovmskb %xmm3, %eax
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- test %eax, %eax
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- jnz L(matches32)
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-
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- movdqa 16(%rdi), %xmm2
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-
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- pcmpeqb %xmm1, %xmm2
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- pcmpeqb (%rdi), %xmm1
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-
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- pmovmskb %xmm2, %eax
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- test %eax, %eax
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- jnz L(matches16)
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-
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- pmovmskb %xmm1, %eax
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- bsr %eax, %eax
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-
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- add %rdi, %rax
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+ENTRY_P2ALIGN(__memrchr, 6)
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+#ifdef __ILP32__
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+ /* Clear upper bits. */
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+ mov %RDX_LP, %RDX_LP
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+#endif
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+ movd %esi, %xmm0
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+
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+ /* Get end pointer. */
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+ leaq (%rdx, %rdi), %rcx
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+
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+ punpcklbw %xmm0, %xmm0
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+ punpcklwd %xmm0, %xmm0
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+ pshufd $0, %xmm0, %xmm0
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+
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+ /* Check if we can load 1x VEC without cross a page. */
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+ testl $(PAGE_SIZE - VEC_SIZE), %ecx
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+ jz L(page_cross)
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+
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+ /* NB: This load happens regardless of whether rdx (len) is zero. Since
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+ it doesn't cross a page and the standard gurantees any pointer have
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+ at least one-valid byte this load must be safe. For the entire
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+ history of the x86 memrchr implementation this has been possible so
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+ no code "should" be relying on a zero-length check before this load.
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+ The zero-length check is moved to the page cross case because it is
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+ 1) pretty cold and including it pushes the hot case len <= VEC_SIZE
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+ into 2-cache lines. */
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+ movups -(VEC_SIZE)(%rcx), %xmm1
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+ pcmpeqb %xmm0, %xmm1
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+ pmovmskb %xmm1, %eax
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+
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+ subq $VEC_SIZE, %rdx
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+ ja L(more_1x_vec)
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+L(ret_vec_x0_test):
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+ /* Zero-flag set if eax (src) is zero. Destination unchanged if src is
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+ zero. */
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+ bsrl %eax, %eax
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+ jz L(ret_0)
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+ /* Check if the CHAR match is in bounds. Need to truly zero `eax` here
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+ if out of bounds. */
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+ addl %edx, %eax
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+ jl L(zero_0)
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+ /* Since we subtracted VEC_SIZE from rdx earlier we can just add to base
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+ ptr. */
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+ addq %rdi, %rax
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+L(ret_0):
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ret
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- .p2align 4
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-L(exit_loop):
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- add $64, %edx
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- cmp $32, %edx
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- jbe L(exit_loop_32)
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-
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- movdqa 48(%rdi), %xmm0
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- pcmpeqb %xmm1, %xmm0
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- pmovmskb %xmm0, %eax
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- test %eax, %eax
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- jnz L(matches48)
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-
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- movdqa 32(%rdi), %xmm2
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- pcmpeqb %xmm1, %xmm2
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- pmovmskb %xmm2, %eax
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- test %eax, %eax
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- jnz L(matches32)
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-
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- movdqa 16(%rdi), %xmm3
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- pcmpeqb %xmm1, %xmm3
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- pmovmskb %xmm3, %eax
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- test %eax, %eax
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- jnz L(matches16_1)
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- cmp $48, %edx
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- jbe L(return_null)
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-
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- pcmpeqb (%rdi), %xmm1
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- pmovmskb %xmm1, %eax
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- test %eax, %eax
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- jnz L(matches0_1)
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- xor %eax, %eax
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+ .p2align 4,, 5
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+L(ret_vec_x0):
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+ bsrl %eax, %eax
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+ leaq -(VEC_SIZE)(%rcx, %rax), %rax
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ret
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- .p2align 4
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-L(exit_loop_32):
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- movdqa 48(%rdi), %xmm0
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- pcmpeqb %xmm1, %xmm0
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- pmovmskb %xmm0, %eax
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- test %eax, %eax
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- jnz L(matches48_1)
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- cmp $16, %edx
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- jbe L(return_null)
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-
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- pcmpeqb 32(%rdi), %xmm1
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- pmovmskb %xmm1, %eax
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- test %eax, %eax
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- jnz L(matches32_1)
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- xor %eax, %eax
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+ .p2align 4,, 2
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+L(zero_0):
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+ xorl %eax, %eax
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ret
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- .p2align 4
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-L(matches0):
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- bsr %eax, %eax
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- add %rdi, %rax
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- ret
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-
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- .p2align 4
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-L(matches16):
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- bsr %eax, %eax
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- lea 16(%rax, %rdi), %rax
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- ret
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- .p2align 4
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-L(matches32):
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- bsr %eax, %eax
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- lea 32(%rax, %rdi), %rax
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+ .p2align 4,, 8
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+L(more_1x_vec):
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+ testl %eax, %eax
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+ jnz L(ret_vec_x0)
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+
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+ /* Align rcx (pointer to string). */
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+ decq %rcx
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+ andq $-VEC_SIZE, %rcx
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+
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+ movq %rcx, %rdx
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+ /* NB: We could consistenyl save 1-byte in this pattern with `movaps
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+ %xmm0, %xmm1; pcmpeq IMM8(r), %xmm1; ...`. The reason against it is
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+ it adds more frontend uops (even if the moves can be eliminated) and
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+ some percentage of the time actual backend uops. */
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+ movaps -(VEC_SIZE)(%rcx), %xmm1
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+ pcmpeqb %xmm0, %xmm1
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+ subq %rdi, %rdx
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+ pmovmskb %xmm1, %eax
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+
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+ cmpq $(VEC_SIZE * 2), %rdx
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+ ja L(more_2x_vec)
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+L(last_2x_vec):
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+ subl $VEC_SIZE, %edx
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+ jbe L(ret_vec_x0_test)
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+
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+ testl %eax, %eax
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+ jnz L(ret_vec_x0)
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+
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+ movaps -(VEC_SIZE * 2)(%rcx), %xmm1
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+ pcmpeqb %xmm0, %xmm1
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+ pmovmskb %xmm1, %eax
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+
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+ subl $VEC_SIZE, %edx
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+ bsrl %eax, %eax
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+ jz L(ret_1)
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+ addl %edx, %eax
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+ jl L(zero_0)
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+ addq %rdi, %rax
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+L(ret_1):
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ret
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- .p2align 4
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-L(matches48):
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- bsr %eax, %eax
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- lea 48(%rax, %rdi), %rax
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+ /* Don't align. Otherwise lose 2-byte encoding in jump to L(page_cross)
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+ causes the hot pause (length <= VEC_SIZE) to span multiple cache
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+ lines. Naturally aligned % 16 to 8-bytes. */
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+L(page_cross):
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+ /* Zero length check. */
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+ testq %rdx, %rdx
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+ jz L(zero_0)
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+
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+ leaq -1(%rcx), %r8
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+ andq $-(VEC_SIZE), %r8
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+
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+ movaps (%r8), %xmm1
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+ pcmpeqb %xmm0, %xmm1
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+ pmovmskb %xmm1, %esi
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+ /* Shift out negative alignment (because we are starting from endptr and
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+ working backwards). */
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+ negl %ecx
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+ /* 32-bit shift but VEC_SIZE=16 so need to mask the shift count
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+ explicitly. */
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+ andl $(VEC_SIZE - 1), %ecx
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+ shl %cl, %esi
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+ movzwl %si, %eax
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+ leaq (%rdi, %rdx), %rcx
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+ cmpq %rdi, %r8
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+ ja L(more_1x_vec)
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+ subl $VEC_SIZE, %edx
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+ bsrl %eax, %eax
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+ jz L(ret_2)
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+ addl %edx, %eax
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+ jl L(zero_1)
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+ addq %rdi, %rax
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+L(ret_2):
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ret
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|
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- .p2align 4
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-L(matches0_1):
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- bsr %eax, %eax
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- sub $64, %rdx
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- add %rax, %rdx
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- jl L(return_null)
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- add %rdi, %rax
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+ /* Fits in aliging bytes. */
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+L(zero_1):
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+ xorl %eax, %eax
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ret
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- .p2align 4
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-L(matches16_1):
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- bsr %eax, %eax
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- sub $48, %rdx
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- add %rax, %rdx
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- jl L(return_null)
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- lea 16(%rdi, %rax), %rax
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+ .p2align 4,, 5
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+L(ret_vec_x1):
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+ bsrl %eax, %eax
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+ leaq -(VEC_SIZE * 2)(%rcx, %rax), %rax
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ret
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|
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- .p2align 4
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-L(matches32_1):
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- bsr %eax, %eax
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- sub $32, %rdx
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- add %rax, %rdx
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- jl L(return_null)
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- lea 32(%rdi, %rax), %rax
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- ret
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+ .p2align 4,, 8
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+L(more_2x_vec):
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+ testl %eax, %eax
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+ jnz L(ret_vec_x0)
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|
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- .p2align 4
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-L(matches48_1):
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- bsr %eax, %eax
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- sub $16, %rdx
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- add %rax, %rdx
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- jl L(return_null)
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- lea 48(%rdi, %rax), %rax
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- ret
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+ movaps -(VEC_SIZE * 2)(%rcx), %xmm1
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+ pcmpeqb %xmm0, %xmm1
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+ pmovmskb %xmm1, %eax
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+ testl %eax, %eax
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+ jnz L(ret_vec_x1)
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|
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- .p2align 4
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-L(return_null):
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- xor %eax, %eax
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- ret
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- .p2align 4
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-L(length_less16_offset0):
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- test %edx, %edx
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- jz L(return_null)
|
|
+ movaps -(VEC_SIZE * 3)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
|
|
- mov %dl, %cl
|
|
- pcmpeqb (%rdi), %xmm1
|
|
+ subq $(VEC_SIZE * 4), %rdx
|
|
+ ja L(more_4x_vec)
|
|
|
|
- mov $1, %edx
|
|
- sal %cl, %edx
|
|
- sub $1, %edx
|
|
+ addl $(VEC_SIZE), %edx
|
|
+ jle L(ret_vec_x2_test)
|
|
|
|
- pmovmskb %xmm1, %eax
|
|
+L(last_vec):
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_x2)
|
|
|
|
- and %edx, %eax
|
|
- test %eax, %eax
|
|
- jz L(return_null)
|
|
+ movaps -(VEC_SIZE * 4)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
|
|
- bsr %eax, %eax
|
|
- add %rdi, %rax
|
|
+ subl $(VEC_SIZE), %edx
|
|
+ bsrl %eax, %eax
|
|
+ jz L(ret_3)
|
|
+ addl %edx, %eax
|
|
+ jl L(zero_2)
|
|
+ addq %rdi, %rax
|
|
+L(ret_3):
|
|
ret
|
|
|
|
- .p2align 4
|
|
-L(length_less16):
|
|
- punpcklbw %xmm1, %xmm1
|
|
- punpcklbw %xmm1, %xmm1
|
|
-
|
|
- add $16, %edx
|
|
-
|
|
- pshufd $0, %xmm1, %xmm1
|
|
-
|
|
- mov %edi, %ecx
|
|
- and $15, %ecx
|
|
- jz L(length_less16_offset0)
|
|
-
|
|
- mov %cl, %dh
|
|
- mov %ecx, %esi
|
|
- add %dl, %dh
|
|
- and $-16, %rdi
|
|
-
|
|
- sub $16, %dh
|
|
- ja L(length_less16_part2)
|
|
-
|
|
- pcmpeqb (%rdi), %xmm1
|
|
- pmovmskb %xmm1, %eax
|
|
-
|
|
- sar %cl, %eax
|
|
- mov %dl, %cl
|
|
-
|
|
- mov $1, %edx
|
|
- sal %cl, %edx
|
|
- sub $1, %edx
|
|
-
|
|
- and %edx, %eax
|
|
- test %eax, %eax
|
|
- jz L(return_null)
|
|
-
|
|
- bsr %eax, %eax
|
|
- add %rdi, %rax
|
|
- add %rsi, %rax
|
|
+ .p2align 4,, 6
|
|
+L(ret_vec_x2_test):
|
|
+ bsrl %eax, %eax
|
|
+ jz L(zero_2)
|
|
+ addl %edx, %eax
|
|
+ jl L(zero_2)
|
|
+ addq %rdi, %rax
|
|
ret
|
|
|
|
- .p2align 4
|
|
-L(length_less16_part2):
|
|
- movdqa 16(%rdi), %xmm2
|
|
- pcmpeqb %xmm1, %xmm2
|
|
- pmovmskb %xmm2, %eax
|
|
-
|
|
- mov %dh, %cl
|
|
- mov $1, %edx
|
|
- sal %cl, %edx
|
|
- sub $1, %edx
|
|
-
|
|
- and %edx, %eax
|
|
+L(zero_2):
|
|
+ xorl %eax, %eax
|
|
+ ret
|
|
|
|
- test %eax, %eax
|
|
- jnz L(length_less16_part2_return)
|
|
|
|
- pcmpeqb (%rdi), %xmm1
|
|
- pmovmskb %xmm1, %eax
|
|
+ .p2align 4,, 5
|
|
+L(ret_vec_x2):
|
|
+ bsrl %eax, %eax
|
|
+ leaq -(VEC_SIZE * 3)(%rcx, %rax), %rax
|
|
+ ret
|
|
|
|
- mov %esi, %ecx
|
|
- sar %cl, %eax
|
|
- test %eax, %eax
|
|
- jz L(return_null)
|
|
+ .p2align 4,, 5
|
|
+L(ret_vec_x3):
|
|
+ bsrl %eax, %eax
|
|
+ leaq -(VEC_SIZE * 4)(%rcx, %rax), %rax
|
|
+ ret
|
|
|
|
- bsr %eax, %eax
|
|
- add %rdi, %rax
|
|
- add %rsi, %rax
|
|
+ .p2align 4,, 8
|
|
+L(more_4x_vec):
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_x2)
|
|
+
|
|
+ movaps -(VEC_SIZE * 4)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
+
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_x3)
|
|
+
|
|
+ addq $-(VEC_SIZE * 4), %rcx
|
|
+ cmpq $(VEC_SIZE * 4), %rdx
|
|
+ jbe L(last_4x_vec)
|
|
+
|
|
+ /* Offset everything by 4x VEC_SIZE here to save a few bytes at the end
|
|
+ keeping the code from spilling to the next cache line. */
|
|
+ addq $(VEC_SIZE * 4 - 1), %rcx
|
|
+ andq $-(VEC_SIZE * 4), %rcx
|
|
+ leaq (VEC_SIZE * 4)(%rdi), %rdx
|
|
+ andq $-(VEC_SIZE * 4), %rdx
|
|
+
|
|
+ .p2align 4,, 11
|
|
+L(loop_4x_vec):
|
|
+ movaps (VEC_SIZE * -1)(%rcx), %xmm1
|
|
+ movaps (VEC_SIZE * -2)(%rcx), %xmm2
|
|
+ movaps (VEC_SIZE * -3)(%rcx), %xmm3
|
|
+ movaps (VEC_SIZE * -4)(%rcx), %xmm4
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pcmpeqb %xmm0, %xmm2
|
|
+ pcmpeqb %xmm0, %xmm3
|
|
+ pcmpeqb %xmm0, %xmm4
|
|
+
|
|
+ por %xmm1, %xmm2
|
|
+ por %xmm3, %xmm4
|
|
+ por %xmm2, %xmm4
|
|
+
|
|
+ pmovmskb %xmm4, %esi
|
|
+ testl %esi, %esi
|
|
+ jnz L(loop_end)
|
|
+
|
|
+ addq $-(VEC_SIZE * 4), %rcx
|
|
+ cmpq %rdx, %rcx
|
|
+ jne L(loop_4x_vec)
|
|
+
|
|
+ subl %edi, %edx
|
|
+
|
|
+ /* Ends up being 1-byte nop. */
|
|
+ .p2align 4,, 2
|
|
+L(last_4x_vec):
|
|
+ movaps -(VEC_SIZE)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
+
|
|
+ cmpl $(VEC_SIZE * 2), %edx
|
|
+ jbe L(last_2x_vec)
|
|
+
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_x0)
|
|
+
|
|
+
|
|
+ movaps -(VEC_SIZE * 2)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
+
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_end)
|
|
+
|
|
+ movaps -(VEC_SIZE * 3)(%rcx), %xmm1
|
|
+ pcmpeqb %xmm0, %xmm1
|
|
+ pmovmskb %xmm1, %eax
|
|
+
|
|
+ subl $(VEC_SIZE * 3), %edx
|
|
+ ja L(last_vec)
|
|
+ bsrl %eax, %eax
|
|
+ jz L(ret_4)
|
|
+ addl %edx, %eax
|
|
+ jl L(zero_3)
|
|
+ addq %rdi, %rax
|
|
+L(ret_4):
|
|
ret
|
|
|
|
- .p2align 4
|
|
-L(length_less16_part2_return):
|
|
- bsr %eax, %eax
|
|
- lea 16(%rax, %rdi), %rax
|
|
+ /* Ends up being 1-byte nop. */
|
|
+ .p2align 4,, 3
|
|
+L(loop_end):
|
|
+ pmovmskb %xmm1, %eax
|
|
+ sall $16, %eax
|
|
+ jnz L(ret_vec_end)
|
|
+
|
|
+ pmovmskb %xmm2, %eax
|
|
+ testl %eax, %eax
|
|
+ jnz L(ret_vec_end)
|
|
+
|
|
+ pmovmskb %xmm3, %eax
|
|
+ /* Combine last 2 VEC matches. If ecx (VEC3) is zero (no CHAR in VEC3)
|
|
+ then it won't affect the result in esi (VEC4). If ecx is non-zero
|
|
+ then CHAR in VEC3 and bsrq will use that position. */
|
|
+ sall $16, %eax
|
|
+ orl %esi, %eax
|
|
+ bsrl %eax, %eax
|
|
+ leaq -(VEC_SIZE * 4)(%rcx, %rax), %rax
|
|
ret
|
|
|
|
-END (__memrchr)
|
|
+L(ret_vec_end):
|
|
+ bsrl %eax, %eax
|
|
+ leaq (VEC_SIZE * -2)(%rax, %rcx), %rax
|
|
+ ret
|
|
+ /* Use in L(last_4x_vec). In the same cache line. This is just a spare
|
|
+ aligning bytes. */
|
|
+L(zero_3):
|
|
+ xorl %eax, %eax
|
|
+ ret
|
|
+ /* 2-bytes from next cache line. */
|
|
+END(__memrchr)
|
|
weak_alias (__memrchr, memrchr)
|