forked from rpms/glibc
02cfe04e36
Resolves: RHEL-15696 Includes two additional (well, 1.5) upstream patches to resolve roundeven redirects.
754 lines
22 KiB
Diff
754 lines
22 KiB
Diff
From 3d9f171bfb5325bd5f427e9fc386453358c6e840 Mon Sep 17 00:00:00 2001
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From: "H.J. Lu" <hjl.tools@gmail.com>
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Date: Mon, 7 Feb 2022 05:55:15 -0800
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Subject: [PATCH] x86-64: Optimize bzero
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Content-type: text/plain; charset=UTF-8
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memset with zero as the value to set is by far the majority value (99%+
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for Python3 and GCC).
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bzero can be slightly more optimized for this case by using a zero-idiom
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xor for broadcasting the set value to a register (vector or GPR).
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Co-developed-by: Noah Goldstein <goldstein.w.n@gmail.com>
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---
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sysdeps/generic/ifunc-init.h | 5 +-
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sysdeps/x86_64/memset.S | 8 +
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sysdeps/x86_64/multiarch/Makefile | 205 +++++++++++-------
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sysdeps/x86_64/multiarch/bzero.c | 106 +++++++++
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sysdeps/x86_64/multiarch/ifunc-impl-list.c | 42 ++++
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.../memset-avx2-unaligned-erms-rtm.S | 1 +
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.../multiarch/memset-avx2-unaligned-erms.S | 6 +
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.../multiarch/memset-avx512-unaligned-erms.S | 3 +
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.../multiarch/memset-evex-unaligned-erms.S | 3 +
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.../multiarch/memset-sse2-unaligned-erms.S | 1 +
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.../multiarch/memset-vec-unaligned-erms.S | 110 +++++++---
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11 files changed, 384 insertions(+), 106 deletions(-)
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create mode 100644 sysdeps/x86_64/multiarch/bzero.c
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Conflicts:
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sysdeps/generic/ifunc-init.h
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(needs macros from cf4fd28ea453d1a9cec93939bc88b58ccef5437a (memcmpeq))
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sysdeps/x86_64/multiarch/Makefile
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(file ordering)
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diff --git a/sysdeps/generic/ifunc-init.h b/sysdeps/generic/ifunc-init.h
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index 241e4161..f7a72375 100644
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--- a/sysdeps/generic/ifunc-init.h
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+++ b/sysdeps/generic/ifunc-init.h
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@@ -50,5 +50,8 @@
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'__<symbol>_<variant>' as the optimized implementation and
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'<symbol>_ifunc_selector' as the IFUNC selector. */
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#define REDIRECT_NAME EVALUATOR1 (__redirect, SYMBOL_NAME)
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-#define OPTIMIZE(name) EVALUATOR2 (SYMBOL_NAME, name)
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+#define OPTIMIZE1(name) EVALUATOR1 (SYMBOL_NAME, name)
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+#define OPTIMIZE2(name) EVALUATOR2 (SYMBOL_NAME, name)
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+/* Default is to use OPTIMIZE2. */
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+#define OPTIMIZE(name) OPTIMIZE2(name)
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#define IFUNC_SELECTOR EVALUATOR1 (SYMBOL_NAME, ifunc_selector)
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diff --git a/sysdeps/x86_64/memset.S b/sysdeps/x86_64/memset.S
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index 4cb4aa71..a1353f89 100644
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--- a/sysdeps/x86_64/memset.S
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+++ b/sysdeps/x86_64/memset.S
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@@ -35,6 +35,9 @@
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punpcklwd %xmm0, %xmm0; \
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pshufd $0, %xmm0, %xmm0
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+# define BZERO_ZERO_VEC0() \
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+ pxor %xmm0, %xmm0
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+
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# define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \
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movd d, %xmm0; \
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pshufd $0, %xmm0, %xmm0; \
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@@ -53,6 +56,10 @@
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# define MEMSET_SYMBOL(p,s) memset
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#endif
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+#ifndef BZERO_SYMBOL
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+# define BZERO_SYMBOL(p,s) __bzero
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+#endif
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+
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#ifndef WMEMSET_SYMBOL
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# define WMEMSET_CHK_SYMBOL(p,s) p
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# define WMEMSET_SYMBOL(p,s) __wmemset
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@@ -63,6 +70,7 @@
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libc_hidden_builtin_def (memset)
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#if IS_IN (libc)
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+weak_alias (__bzero, bzero)
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libc_hidden_def (__wmemset)
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weak_alias (__wmemset, wmemset)
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libc_hidden_weak (wmemset)
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diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile
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index 26be4095..37d8d6f0 100644
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--- a/sysdeps/x86_64/multiarch/Makefile
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+++ b/sysdeps/x86_64/multiarch/Makefile
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@@ -1,85 +1,130 @@
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ifeq ($(subdir),string)
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-sysdep_routines += strncat-c stpncpy-c strncpy-c \
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- strcmp-sse2 strcmp-sse2-unaligned strcmp-ssse3 \
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- strcmp-sse4_2 strcmp-avx2 \
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- strncmp-sse2 strncmp-ssse3 strncmp-sse4_2 strncmp-avx2 \
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- memchr-sse2 rawmemchr-sse2 memchr-avx2 rawmemchr-avx2 \
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- memrchr-sse2 memrchr-avx2 \
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- memcmp-sse2 \
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- memcmp-avx2-movbe \
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- memcmp-sse4 memcpy-ssse3 \
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- memmove-ssse3 \
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- memcpy-ssse3-back \
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- memmove-ssse3-back \
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- memmove-avx512-no-vzeroupper \
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- strcasecmp_l-sse2 strcasecmp_l-ssse3 \
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- strcasecmp_l-sse4_2 strcasecmp_l-avx \
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- strncase_l-sse2 strncase_l-ssse3 \
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- strncase_l-sse4_2 strncase_l-avx \
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- strchr-sse2 strchrnul-sse2 strchr-avx2 strchrnul-avx2 \
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- strrchr-sse2 strrchr-avx2 \
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- strlen-sse2 strnlen-sse2 strlen-avx2 strnlen-avx2 \
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- strcat-avx2 strncat-avx2 \
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- strcat-ssse3 strncat-ssse3\
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- strcpy-avx2 strncpy-avx2 \
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- strcpy-sse2 stpcpy-sse2 \
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- strcpy-ssse3 strncpy-ssse3 stpcpy-ssse3 stpncpy-ssse3 \
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- strcpy-sse2-unaligned strncpy-sse2-unaligned \
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- stpcpy-sse2-unaligned stpncpy-sse2-unaligned \
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- stpcpy-avx2 stpncpy-avx2 \
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- strcat-sse2 \
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- strcat-sse2-unaligned strncat-sse2-unaligned \
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- strchr-sse2-no-bsf memcmp-ssse3 strstr-sse2-unaligned \
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- strcspn-sse2 strpbrk-sse2 strspn-sse2 \
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- strcspn-c strpbrk-c strspn-c varshift \
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- memset-avx512-no-vzeroupper \
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- memmove-sse2-unaligned-erms \
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- memmove-avx-unaligned-erms \
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- memmove-avx512-unaligned-erms \
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- memset-sse2-unaligned-erms \
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- memset-avx2-unaligned-erms \
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- memset-avx512-unaligned-erms \
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- memchr-avx2-rtm \
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- memcmp-avx2-movbe-rtm \
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- memmove-avx-unaligned-erms-rtm \
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- memrchr-avx2-rtm \
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- memset-avx2-unaligned-erms-rtm \
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- rawmemchr-avx2-rtm \
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- strchr-avx2-rtm \
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- strcmp-avx2-rtm \
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- strchrnul-avx2-rtm \
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- stpcpy-avx2-rtm \
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- stpncpy-avx2-rtm \
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- strcat-avx2-rtm \
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- strcpy-avx2-rtm \
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- strlen-avx2-rtm \
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- strncat-avx2-rtm \
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- strncmp-avx2-rtm \
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- strncpy-avx2-rtm \
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- strnlen-avx2-rtm \
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- strrchr-avx2-rtm \
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- memchr-evex \
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- memcmp-evex-movbe \
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- memmove-evex-unaligned-erms \
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- memrchr-evex \
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- memset-evex-unaligned-erms \
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- rawmemchr-evex \
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- stpcpy-evex \
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- stpncpy-evex \
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- strcat-evex \
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- strchr-evex \
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- strchrnul-evex \
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- strcmp-evex \
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- strcpy-evex \
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- strlen-evex \
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- strncat-evex \
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- strncmp-evex \
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- strncpy-evex \
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- strnlen-evex \
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- strrchr-evex \
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- memchr-evex-rtm \
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- rawmemchr-evex-rtm
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+sysdep_routines += \
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+ bzero \
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+ memchr-avx2 \
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+ memchr-avx2-rtm \
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+ memchr-evex \
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+ memchr-evex-rtm \
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+ memchr-sse2 \
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+ memcmp-avx2-movbe \
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+ memcmp-avx2-movbe-rtm \
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+ memcmp-evex-movbe \
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+ memcmp-sse2 \
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+ memcmp-sse4 \
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+ memcmp-ssse3 \
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+ memcpy-ssse3 \
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+ memcpy-ssse3-back \
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+ memmove-avx-unaligned-erms \
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+ memmove-avx-unaligned-erms-rtm \
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+ memmove-avx512-no-vzeroupper \
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+ memmove-avx512-unaligned-erms \
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+ memmove-evex-unaligned-erms \
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+ memmove-sse2-unaligned-erms \
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+ memmove-ssse3 \
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+ memmove-ssse3-back \
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+ memrchr-avx2 \
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+ memrchr-avx2-rtm \
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+ memrchr-evex \
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+ memrchr-sse2 \
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+ memset-avx2-unaligned-erms \
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+ memset-avx2-unaligned-erms-rtm \
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+ memset-avx512-no-vzeroupper \
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+ memset-avx512-unaligned-erms \
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+ memset-evex-unaligned-erms \
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+ memset-sse2-unaligned-erms \
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+ rawmemchr-avx2 \
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+ rawmemchr-avx2-rtm \
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+ rawmemchr-evex \
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+ rawmemchr-evex-rtm \
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+ rawmemchr-sse2 \
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+ stpcpy-avx2 \
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+ stpcpy-avx2-rtm \
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+ stpcpy-evex \
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+ stpcpy-sse2 \
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+ stpcpy-sse2-unaligned \
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+ stpcpy-ssse3 \
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+ stpncpy-avx2 \
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+ stpncpy-avx2-rtm \
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+ stpncpy-c \
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+ stpncpy-evex \
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+ stpncpy-sse2-unaligned \
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+ stpncpy-ssse3 \
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+ strcasecmp_l-avx \
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+ strcasecmp_l-sse2 \
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+ strcasecmp_l-sse4_2 \
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+ strcasecmp_l-ssse3 \
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+ strcat-avx2 \
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+ strcat-avx2-rtm \
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+ strcat-evex \
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+ strcat-sse2 \
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+ strcat-sse2-unaligned \
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+ strcat-ssse3 \
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+ strchr-avx2 \
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+ strchr-avx2-rtm \
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+ strchr-evex \
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+ strchr-sse2 \
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+ strchr-sse2-no-bsf \
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+ strchrnul-avx2 \
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+ strchrnul-avx2-rtm \
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+ strchrnul-evex \
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+ strchrnul-sse2 \
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+ strcmp-avx2 \
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+ strcmp-avx2-rtm \
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+ strcmp-evex \
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+ strcmp-sse2 \
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+ strcmp-sse2-unaligned \
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+ strcmp-sse4_2 \
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+ strcmp-ssse3 \
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+ strcpy-avx2 \
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+ strcpy-avx2-rtm \
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+ strcpy-evex \
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+ strcpy-sse2 \
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+ strcpy-sse2-unaligned \
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+ strcpy-ssse3 \
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+ strcspn-c \
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+ strcspn-sse2 \
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+ strlen-avx2 \
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+ strlen-avx2-rtm \
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+ strlen-evex \
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+ strlen-sse2 \
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+ strncase_l-avx \
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+ strncase_l-sse2 \
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+ strncase_l-sse4_2 \
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+ strncase_l-ssse3 \
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+ strncat-avx2 \
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+ strncat-avx2-rtm \
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+ strncat-c \
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+ strncat-evex \
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+ strncat-sse2-unaligned \
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+ strncat-ssse3 \
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+ strncmp-avx2 \
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+ strncmp-avx2-rtm \
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+ strncmp-evex \
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+ strncmp-sse2 \
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+ strncmp-sse4_2 \
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+ strncmp-ssse3 \
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+ strncpy-avx2 \
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+ strncpy-avx2-rtm \
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+ strncpy-c \
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+ strncpy-evex \
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+ strncpy-sse2-unaligned \
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+ strncpy-ssse3 \
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+ strnlen-avx2 \
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+ strnlen-avx2-rtm \
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+ strnlen-evex \
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+ strnlen-sse2 \
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+ strpbrk-c \
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+ strpbrk-sse2 \
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+ strrchr-avx2 \
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+ strrchr-avx2-rtm \
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+ strrchr-evex \
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+ strrchr-sse2 \
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+ strspn-c \
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+ strspn-sse2 \
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+ strstr-sse2-unaligned \
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+ varshift \
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+# sysdep_routines
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CFLAGS-varshift.c += -msse4
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CFLAGS-strcspn-c.c += -msse4
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CFLAGS-strpbrk-c.c += -msse4
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diff --git a/sysdeps/x86_64/multiarch/bzero.c b/sysdeps/x86_64/multiarch/bzero.c
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new file mode 100644
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index 00000000..58a14b2c
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--- /dev/null
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+++ b/sysdeps/x86_64/multiarch/bzero.c
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@@ -0,0 +1,106 @@
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+/* Multiple versions of bzero.
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+ All versions must be listed in ifunc-impl-list.c.
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+ Copyright (C) 2022 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <https://www.gnu.org/licenses/>. */
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+
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+/* Define multiple versions only for the definition in libc. */
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+#if IS_IN (libc)
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+# define __bzero __redirect___bzero
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+# include <string.h>
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+# undef __bzero
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+
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+# define SYMBOL_NAME __bzero
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+# include <init-arch.h>
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+
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (sse2_unaligned)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (sse2_unaligned_erms)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx2_unaligned) attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx2_unaligned_erms)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx2_unaligned_rtm)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx2_unaligned_erms_rtm)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (evex_unaligned)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (evex_unaligned_erms)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx512_unaligned)
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+ attribute_hidden;
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+extern __typeof (REDIRECT_NAME) OPTIMIZE1 (avx512_unaligned_erms)
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+ attribute_hidden;
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+
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+static inline void *
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+IFUNC_SELECTOR (void)
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+{
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+ const struct cpu_features* cpu_features = __get_cpu_features ();
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+
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F)
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+ && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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+ && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
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+ && CPU_FEATURE_USABLE_P (cpu_features, BMI2))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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+ return OPTIMIZE1 (avx512_unaligned_erms);
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+
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+ return OPTIMIZE1 (avx512_unaligned);
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+ }
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+ }
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+
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX2))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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+ && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
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+ && CPU_FEATURE_USABLE_P (cpu_features, BMI2))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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+ return OPTIMIZE1 (evex_unaligned_erms);
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+
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+ return OPTIMIZE1 (evex_unaligned);
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+ }
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+
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+ if (CPU_FEATURE_USABLE_P (cpu_features, RTM))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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+ return OPTIMIZE1 (avx2_unaligned_erms_rtm);
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+
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+ return OPTIMIZE1 (avx2_unaligned_rtm);
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+ }
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+
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+ if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER))
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+ {
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+ if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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+ return OPTIMIZE1 (avx2_unaligned_erms);
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+
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+ return OPTIMIZE1 (avx2_unaligned);
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+ }
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+ }
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+
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+ if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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+ return OPTIMIZE1 (sse2_unaligned_erms);
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+
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+ return OPTIMIZE1 (sse2_unaligned);
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+}
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+
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+libc_ifunc_redirected (__redirect___bzero, __bzero, IFUNC_SELECTOR ());
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+
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+weak_alias (__bzero, bzero)
|
|
+#endif
|
|
diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
|
|
index 8be0d78a..c963d391 100644
|
|
--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
|
|
+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
|
|
@@ -282,6 +282,48 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
|
|
__memset_avx512_no_vzeroupper)
|
|
)
|
|
|
|
+ /* Support sysdeps/x86_64/multiarch/bzero.c. */
|
|
+ IFUNC_IMPL (i, name, bzero,
|
|
+ IFUNC_IMPL_ADD (array, i, bzero, 1,
|
|
+ __bzero_sse2_unaligned)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero, 1,
|
|
+ __bzero_sse2_unaligned_erms)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ CPU_FEATURE_USABLE (AVX2),
|
|
+ __bzero_avx2_unaligned)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ CPU_FEATURE_USABLE (AVX2),
|
|
+ __bzero_avx2_unaligned_erms)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX2)
|
|
+ && CPU_FEATURE_USABLE (RTM)),
|
|
+ __bzero_avx2_unaligned_rtm)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX2)
|
|
+ && CPU_FEATURE_USABLE (RTM)),
|
|
+ __bzero_avx2_unaligned_erms_rtm)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX512VL)
|
|
+ && CPU_FEATURE_USABLE (AVX512BW)
|
|
+ && CPU_FEATURE_USABLE (BMI2)),
|
|
+ __bzero_evex_unaligned)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX512VL)
|
|
+ && CPU_FEATURE_USABLE (AVX512BW)
|
|
+ && CPU_FEATURE_USABLE (BMI2)),
|
|
+ __bzero_evex_unaligned_erms)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX512VL)
|
|
+ && CPU_FEATURE_USABLE (AVX512BW)
|
|
+ && CPU_FEATURE_USABLE (BMI2)),
|
|
+ __bzero_avx512_unaligned_erms)
|
|
+ IFUNC_IMPL_ADD (array, i, bzero,
|
|
+ (CPU_FEATURE_USABLE (AVX512VL)
|
|
+ && CPU_FEATURE_USABLE (AVX512BW)
|
|
+ && CPU_FEATURE_USABLE (BMI2)),
|
|
+ __bzero_avx512_unaligned)
|
|
+ )
|
|
+
|
|
/* Support sysdeps/x86_64/multiarch/rawmemchr.c. */
|
|
IFUNC_IMPL (i, name, rawmemchr,
|
|
IFUNC_IMPL_ADD (array, i, rawmemchr,
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms-rtm.S b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms-rtm.S
|
|
index 8ac3e479..5a5ee6f6 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms-rtm.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms-rtm.S
|
|
@@ -5,6 +5,7 @@
|
|
|
|
#define SECTION(p) p##.avx.rtm
|
|
#define MEMSET_SYMBOL(p,s) p##_avx2_##s##_rtm
|
|
+#define BZERO_SYMBOL(p,s) p##_avx2_##s##_rtm
|
|
#define WMEMSET_SYMBOL(p,s) p##_avx2_##s##_rtm
|
|
|
|
#include "memset-avx2-unaligned-erms.S"
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S
|
|
index c0bf2875..a093a283 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S
|
|
@@ -14,6 +14,9 @@
|
|
vmovd d, %xmm0; \
|
|
movq r, %rax;
|
|
|
|
+# define BZERO_ZERO_VEC0() \
|
|
+ vpxor %xmm0, %xmm0, %xmm0
|
|
+
|
|
# define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \
|
|
MEMSET_SET_VEC0_AND_SET_RETURN(d, r)
|
|
|
|
@@ -29,6 +32,9 @@
|
|
# ifndef MEMSET_SYMBOL
|
|
# define MEMSET_SYMBOL(p,s) p##_avx2_##s
|
|
# endif
|
|
+# ifndef BZERO_SYMBOL
|
|
+# define BZERO_SYMBOL(p,s) p##_avx2_##s
|
|
+# endif
|
|
# ifndef WMEMSET_SYMBOL
|
|
# define WMEMSET_SYMBOL(p,s) p##_avx2_##s
|
|
# endif
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
|
|
index 5241216a..727c9213 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
|
|
@@ -19,6 +19,9 @@
|
|
vpbroadcastb d, %VEC0; \
|
|
movq r, %rax
|
|
|
|
+# define BZERO_ZERO_VEC0() \
|
|
+ vpxorq %XMM0, %XMM0, %XMM0
|
|
+
|
|
# define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \
|
|
vpbroadcastd d, %VEC0; \
|
|
movq r, %rax
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
|
|
index 63700215..5d8fa78f 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
|
|
@@ -19,6 +19,9 @@
|
|
vpbroadcastb d, %VEC0; \
|
|
movq r, %rax
|
|
|
|
+# define BZERO_ZERO_VEC0() \
|
|
+ vpxorq %XMM0, %XMM0, %XMM0
|
|
+
|
|
# define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \
|
|
vpbroadcastd d, %VEC0; \
|
|
movq r, %rax
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S
|
|
index 56b81f5c..8f579ad6 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S
|
|
@@ -22,6 +22,7 @@
|
|
|
|
#if IS_IN (libc)
|
|
# define MEMSET_SYMBOL(p,s) p##_sse2_##s
|
|
+# define BZERO_SYMBOL(p,s) MEMSET_SYMBOL (p, s)
|
|
# define WMEMSET_SYMBOL(p,s) p##_sse2_##s
|
|
|
|
# ifdef SHARED
|
|
diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
|
|
index a67f9833..06f5f5d7 100644
|
|
--- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
|
|
+++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
|
|
@@ -26,6 +26,10 @@
|
|
|
|
#include <sysdep.h>
|
|
|
|
+#ifndef BZERO_SYMBOL
|
|
+# define BZERO_SYMBOL(p,s) MEMSET_SYMBOL (p, s)
|
|
+#endif
|
|
+
|
|
#ifndef MEMSET_CHK_SYMBOL
|
|
# define MEMSET_CHK_SYMBOL(p,s) MEMSET_SYMBOL(p, s)
|
|
#endif
|
|
@@ -87,6 +91,18 @@
|
|
# define XMM_SMALL 0
|
|
#endif
|
|
|
|
+#ifdef USE_LESS_VEC_MASK_STORE
|
|
+# define SET_REG64 rcx
|
|
+# define SET_REG32 ecx
|
|
+# define SET_REG16 cx
|
|
+# define SET_REG8 cl
|
|
+#else
|
|
+# define SET_REG64 rsi
|
|
+# define SET_REG32 esi
|
|
+# define SET_REG16 si
|
|
+# define SET_REG8 sil
|
|
+#endif
|
|
+
|
|
#define PAGE_SIZE 4096
|
|
|
|
/* Macro to calculate size of small memset block for aligning
|
|
@@ -96,18 +112,6 @@
|
|
|
|
#ifndef SECTION
|
|
# error SECTION is not defined!
|
|
-#endif
|
|
-
|
|
- .section SECTION(.text),"ax",@progbits
|
|
-#if VEC_SIZE == 16 && IS_IN (libc)
|
|
-ENTRY (__bzero)
|
|
- mov %RDI_LP, %RAX_LP /* Set return value. */
|
|
- mov %RSI_LP, %RDX_LP /* Set n. */
|
|
- xorl %esi, %esi
|
|
- pxor %XMM0, %XMM0
|
|
- jmp L(entry_from_bzero)
|
|
-END (__bzero)
|
|
-weak_alias (__bzero, bzero)
|
|
#endif
|
|
|
|
#if IS_IN (libc)
|
|
@@ -123,12 +127,37 @@ ENTRY (WMEMSET_SYMBOL (__wmemset, unaligned))
|
|
WMEMSET_SET_VEC0_AND_SET_RETURN (%esi, %rdi)
|
|
WMEMSET_VDUP_TO_VEC0_LOW()
|
|
cmpq $VEC_SIZE, %rdx
|
|
- jb L(less_vec_no_vdup)
|
|
+ jb L(less_vec_from_wmemset)
|
|
WMEMSET_VDUP_TO_VEC0_HIGH()
|
|
jmp L(entry_from_wmemset)
|
|
END (WMEMSET_SYMBOL (__wmemset, unaligned))
|
|
#endif
|
|
|
|
+ENTRY (BZERO_SYMBOL(__bzero, unaligned))
|
|
+#if VEC_SIZE > 16
|
|
+ BZERO_ZERO_VEC0 ()
|
|
+#endif
|
|
+ mov %RDI_LP, %RAX_LP
|
|
+ mov %RSI_LP, %RDX_LP
|
|
+#ifndef USE_LESS_VEC_MASK_STORE
|
|
+ xorl %esi, %esi
|
|
+#endif
|
|
+ cmp $VEC_SIZE, %RDX_LP
|
|
+ jb L(less_vec_no_vdup)
|
|
+#ifdef USE_LESS_VEC_MASK_STORE
|
|
+ xorl %esi, %esi
|
|
+#endif
|
|
+#if VEC_SIZE <= 16
|
|
+ BZERO_ZERO_VEC0 ()
|
|
+#endif
|
|
+ cmp $(VEC_SIZE * 2), %RDX_LP
|
|
+ ja L(more_2x_vec)
|
|
+ /* From VEC and to 2 * VEC. No branch when size == VEC_SIZE. */
|
|
+ VMOVU %VEC(0), (%rdi)
|
|
+ VMOVU %VEC(0), (VEC_SIZE * -1)(%rdi, %rdx)
|
|
+ VZEROUPPER_RETURN
|
|
+END (BZERO_SYMBOL(__bzero, unaligned))
|
|
+
|
|
#if defined SHARED && IS_IN (libc)
|
|
ENTRY_CHK (MEMSET_CHK_SYMBOL (__memset_chk, unaligned))
|
|
cmp %RDX_LP, %RCX_LP
|
|
@@ -142,7 +171,6 @@ ENTRY (MEMSET_SYMBOL (__memset, unaligned))
|
|
/* Clear the upper 32 bits. */
|
|
mov %edx, %edx
|
|
# endif
|
|
-L(entry_from_bzero):
|
|
cmpq $VEC_SIZE, %rdx
|
|
jb L(less_vec)
|
|
MEMSET_VDUP_TO_VEC0_HIGH()
|
|
@@ -187,6 +215,31 @@ END (__memset_erms)
|
|
END (MEMSET_SYMBOL (__memset, erms))
|
|
# endif
|
|
|
|
+ENTRY_P2ALIGN (BZERO_SYMBOL(__bzero, unaligned_erms), 6)
|
|
+# if VEC_SIZE > 16
|
|
+ BZERO_ZERO_VEC0 ()
|
|
+# endif
|
|
+ mov %RDI_LP, %RAX_LP
|
|
+ mov %RSI_LP, %RDX_LP
|
|
+# ifndef USE_LESS_VEC_MASK_STORE
|
|
+ xorl %esi, %esi
|
|
+# endif
|
|
+ cmp $VEC_SIZE, %RDX_LP
|
|
+ jb L(less_vec_no_vdup)
|
|
+# ifdef USE_LESS_VEC_MASK_STORE
|
|
+ xorl %esi, %esi
|
|
+# endif
|
|
+# if VEC_SIZE <= 16
|
|
+ BZERO_ZERO_VEC0 ()
|
|
+# endif
|
|
+ cmp $(VEC_SIZE * 2), %RDX_LP
|
|
+ ja L(stosb_more_2x_vec)
|
|
+ /* From VEC and to 2 * VEC. No branch when size == VEC_SIZE. */
|
|
+ VMOVU %VEC(0), (%rdi)
|
|
+ VMOVU %VEC(0), (VEC_SIZE * -1)(%rdi, %rdx)
|
|
+ VZEROUPPER_RETURN
|
|
+END (BZERO_SYMBOL(__bzero, unaligned_erms))
|
|
+
|
|
# if defined SHARED && IS_IN (libc)
|
|
ENTRY_CHK (MEMSET_CHK_SYMBOL (__memset_chk, unaligned_erms))
|
|
cmp %RDX_LP, %RCX_LP
|
|
@@ -229,6 +282,7 @@ L(last_2x_vec):
|
|
.p2align 4,, 10
|
|
L(less_vec):
|
|
L(less_vec_no_vdup):
|
|
+L(less_vec_from_wmemset):
|
|
/* Less than 1 VEC. */
|
|
# if VEC_SIZE != 16 && VEC_SIZE != 32 && VEC_SIZE != 64
|
|
# error Unsupported VEC_SIZE!
|
|
@@ -374,8 +428,11 @@ L(less_vec):
|
|
/* Broadcast esi to partial register (i.e VEC_SIZE == 32 broadcast to
|
|
xmm). This is only does anything for AVX2. */
|
|
MEMSET_VDUP_TO_VEC0_LOW ()
|
|
+L(less_vec_from_wmemset):
|
|
+#if VEC_SIZE > 16
|
|
L(less_vec_no_vdup):
|
|
#endif
|
|
+#endif
|
|
L(cross_page):
|
|
#if VEC_SIZE > 32
|
|
cmpl $32, %edx
|
|
@@ -386,7 +443,10 @@ L(cross_page):
|
|
jge L(between_16_31)
|
|
#endif
|
|
#ifndef USE_XMM_LESS_VEC
|
|
- MOVQ %XMM0, %rcx
|
|
+ MOVQ %XMM0, %SET_REG64
|
|
+#endif
|
|
+#if VEC_SIZE <= 16
|
|
+L(less_vec_no_vdup):
|
|
#endif
|
|
cmpl $8, %edx
|
|
jge L(between_8_15)
|
|
@@ -395,7 +455,7 @@ L(cross_page):
|
|
cmpl $1, %edx
|
|
jg L(between_2_3)
|
|
jl L(between_0_0)
|
|
- movb %sil, (%LESS_VEC_REG)
|
|
+ movb %SET_REG8, (%LESS_VEC_REG)
|
|
L(between_0_0):
|
|
ret
|
|
|
|
@@ -428,8 +488,8 @@ L(between_8_15):
|
|
MOVQ %XMM0, (%rdi)
|
|
MOVQ %XMM0, -8(%rdi, %rdx)
|
|
#else
|
|
- movq %rcx, (%LESS_VEC_REG)
|
|
- movq %rcx, -8(%LESS_VEC_REG, %rdx)
|
|
+ movq %SET_REG64, (%LESS_VEC_REG)
|
|
+ movq %SET_REG64, -8(%LESS_VEC_REG, %rdx)
|
|
#endif
|
|
ret
|
|
|
|
@@ -442,8 +502,8 @@ L(between_4_7):
|
|
MOVD %XMM0, (%rdi)
|
|
MOVD %XMM0, -4(%rdi, %rdx)
|
|
#else
|
|
- movl %ecx, (%LESS_VEC_REG)
|
|
- movl %ecx, -4(%LESS_VEC_REG, %rdx)
|
|
+ movl %SET_REG32, (%LESS_VEC_REG)
|
|
+ movl %SET_REG32, -4(%LESS_VEC_REG, %rdx)
|
|
#endif
|
|
ret
|
|
|
|
@@ -452,12 +512,12 @@ L(between_4_7):
|
|
L(between_2_3):
|
|
/* From 2 to 3. No branch when size == 2. */
|
|
#ifdef USE_XMM_LESS_VEC
|
|
- movb %sil, (%rdi)
|
|
- movb %sil, 1(%rdi)
|
|
- movb %sil, -1(%rdi, %rdx)
|
|
+ movb %SET_REG8, (%rdi)
|
|
+ movb %SET_REG8, 1(%rdi)
|
|
+ movb %SET_REG8, -1(%rdi, %rdx)
|
|
#else
|
|
- movw %cx, (%LESS_VEC_REG)
|
|
- movb %sil, -1(%LESS_VEC_REG, %rdx)
|
|
+ movw %SET_REG16, (%LESS_VEC_REG)
|
|
+ movb %SET_REG8, -1(%LESS_VEC_REG, %rdx)
|
|
#endif
|
|
ret
|
|
END (MEMSET_SYMBOL (__memset, unaligned_erms))
|
|
--
|
|
GitLab
|
|
|