forked from rpms/glibc
52 lines
1.5 KiB
Diff
52 lines
1.5 KiB
Diff
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From d672a98a1af106bd68deb15576710cd61363f7a6 Mon Sep 17 00:00:00 2001
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From: "H.J. Lu" <hjl.tools@gmail.com>
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Date: Tue, 2 Nov 2021 18:33:07 -0700
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Subject: [PATCH] Add LLL_MUTEX_READ_LOCK [BZ #28537]
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Content-type: text/plain; charset=UTF-8
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CAS instruction is expensive. From the x86 CPU's point of view, getting
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a cache line for writing is more expensive than reading. See Appendix
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A.2 Spinlock in:
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https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf
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The full compare and swap will grab the cache line exclusive and cause
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excessive cache line bouncing.
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Add LLL_MUTEX_READ_LOCK to do an atomic load and skip CAS in spinlock
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loop if compare may fail to reduce cache line bouncing on contended locks.
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Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
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---
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nptl/pthread_mutex_lock.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/nptl/pthread_mutex_lock.c b/nptl/pthread_mutex_lock.c
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index 60ada70d..eb4d8baa 100644
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--- a/nptl/pthread_mutex_lock.c
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+++ b/nptl/pthread_mutex_lock.c
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@@ -56,6 +56,11 @@
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#define FORCE_ELISION(m, s)
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#endif
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+#ifndef LLL_MUTEX_READ_LOCK
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+# define LLL_MUTEX_READ_LOCK(mutex) \
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+ atomic_load_relaxed (&(mutex)->__data.__lock)
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+#endif
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+
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static int __pthread_mutex_lock_full (pthread_mutex_t *mutex)
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__attribute_noinline__;
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@@ -136,6 +141,8 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
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break;
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}
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atomic_spin_nop ();
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+ if (LLL_MUTEX_READ_LOCK (mutex) != 0)
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+ continue;
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}
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while (LLL_MUTEX_TRYLOCK (mutex) != 0);
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--
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GitLab
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