forked from rpms/glibc
38 lines
1.2 KiB
Diff
38 lines
1.2 KiB
Diff
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commit 4db172a54d43f9b7fd17e66fc44a34efb3cab1e1
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Author: Xi Ruoyao <xry111@mengyan1223.wang>
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Date: Fri Aug 13 16:01:14 2021 +0000
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mips: increase stack alignment in clone to match the ABI
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In "mips: align stack in clone [BZ #28223]"
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(commit 1f51cd9a860ee45eee8a56fb2ba925267a2a7bfe) I made a mistake: I
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misbelieved one "word" was 2-byte and "doubleword" should be 4-byte.
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But in MIPS ABI one "word" is defined 32-bit (4-byte), so "doubleword" is
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8-byte [1], and "quadword" is 16-byte [2].
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[1]: "System V Application Binary Interface: MIPS(R) RISC Processor
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Supplement, 3rd edition", page 3-31
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[2]: "MIPSpro(TM) 64-Bit Porting and Transition Guide", page 23
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(cherry picked from commit 0f62fe053273ff6c62ac95c59b7687c964737b00)
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diff --git a/sysdeps/unix/sysv/linux/mips/clone.S b/sysdeps/unix/sysv/linux/mips/clone.S
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index 43a5ad3a400d9504..fd71b5ca2eb86089 100644
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--- a/sysdeps/unix/sysv/linux/mips/clone.S
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+++ b/sysdeps/unix/sysv/linux/mips/clone.S
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@@ -55,11 +55,11 @@ NESTED(__clone,4*SZREG,sp)
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.set at
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#endif
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- /* Align stack to 4/8 bytes per the ABI. */
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+ /* Align stack to 8/16 bytes per the ABI. */
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#if _MIPS_SIM == _ABIO32
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- li t0,-4
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-#else
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li t0,-8
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+#else
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+ li t0,-16
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#endif
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and a1,a1,t0
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