forked from rpms/glibc
97 lines
2.4 KiB
Diff
97 lines
2.4 KiB
Diff
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From a5db6a5cae6a92d1675c013e5c8d972768721576 Mon Sep 17 00:00:00 2001
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From: Wilco Dijkstra <wdijkstr@arm.com>
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Date: Tue, 10 Aug 2021 13:46:20 +0100
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Subject: [PATCH] [5/5] AArch64: Improve A64FX memset medium loops
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Simplify the code for memsets smaller than L1. Improve the unroll8 and
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L1_prefetch loops.
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Reviewed-by: Naohiro Tamura <naohirot@fujitsu.com>
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---
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sysdeps/aarch64/multiarch/memset_a64fx.S | 45 ++++++++++--------------
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1 file changed, 19 insertions(+), 26 deletions(-)
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diff --git a/sysdeps/aarch64/multiarch/memset_a64fx.S b/sysdeps/aarch64/multiarch/memset_a64fx.S
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index ef0315658a..7bf759b6a7 100644
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--- a/sysdeps/aarch64/multiarch/memset_a64fx.S
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+++ b/sysdeps/aarch64/multiarch/memset_a64fx.S
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@@ -30,7 +30,6 @@
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#define L2_SIZE (8*1024*1024) // L2 8MB
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#define CACHE_LINE_SIZE 256
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#define PF_DIST_L1 (CACHE_LINE_SIZE * 16) // Prefetch distance L1
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-#define rest x2
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#define vector_length x9
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#if HAVE_AARCH64_SVE_ASM
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@@ -89,29 +88,19 @@ ENTRY (MEMSET)
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.p2align 4
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L(vl_agnostic): // VL Agnostic
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- mov rest, count
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mov dst, dstin
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- add dstend, dstin, count
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- // if rest >= L2_SIZE && vector_length == 64 then L(L2)
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- mov tmp1, 64
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- cmp rest, L2_SIZE
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- ccmp vector_length, tmp1, 0, cs
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- b.eq L(L2)
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- // if rest >= L1_SIZE && vector_length == 64 then L(L1_prefetch)
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- cmp rest, L1_SIZE
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- ccmp vector_length, tmp1, 0, cs
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- b.eq L(L1_prefetch)
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-
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+ cmp count, L1_SIZE
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+ b.hi L(L1_prefetch)
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+ // count >= 8 * vector_length
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L(unroll8):
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- lsl tmp1, vector_length, 3
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- .p2align 3
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-1: cmp rest, tmp1
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- b.cc L(last)
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- st1b_unroll
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+ sub count, count, tmp1
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+ .p2align 4
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+1: st1b_unroll 0, 7
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add dst, dst, tmp1
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- sub rest, rest, tmp1
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- b 1b
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+ subs count, count, tmp1
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+ b.hi 1b
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+ add count, count, tmp1
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L(last):
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cmp count, vector_length, lsl 1
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@@ -129,18 +118,22 @@ L(last):
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st1b z0.b, p0, [dstend, -1, mul vl]
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ret
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-L(L1_prefetch): // if rest >= L1_SIZE
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+ // count >= L1_SIZE
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.p2align 3
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+L(L1_prefetch):
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+ cmp count, L2_SIZE
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+ b.hs L(L2)
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+ cmp vector_length, 64
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+ b.ne L(unroll8)
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1: st1b_unroll 0, 3
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prfm pstl1keep, [dst, PF_DIST_L1]
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st1b_unroll 4, 7
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prfm pstl1keep, [dst, PF_DIST_L1 + CACHE_LINE_SIZE]
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add dst, dst, CACHE_LINE_SIZE * 2
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- sub rest, rest, CACHE_LINE_SIZE * 2
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- cmp rest, L1_SIZE
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- b.ge 1b
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- cbnz rest, L(unroll8)
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- ret
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+ sub count, count, CACHE_LINE_SIZE * 2
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+ cmp count, PF_DIST_L1
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+ b.hs 1b
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+ b L(unroll8)
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// count >= L2_SIZE
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.p2align 3
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--
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2.31.1
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