forked from rpms/glibc
269 lines
11 KiB
Diff
269 lines
11 KiB
Diff
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From 78c9ec9000f873abe7a15a91b87080a2e4308260 Mon Sep 17 00:00:00 2001
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From: "H.J. Lu" <hjl.tools@gmail.com>
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Date: Fri, 20 Aug 2021 06:42:24 -0700
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Subject: [PATCH] x86-64: Optimize load of all bits set into ZMM register [BZ
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#28252]
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Content-type: text/plain; charset=UTF-8
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Optimize loads of all bits set into ZMM register in AVX512 SVML codes
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by replacing
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vpbroadcastq .L_2il0floatpacket.16(%rip), %zmmX
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and
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vmovups .L_2il0floatpacket.13(%rip), %zmmX
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with
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vpternlogd $0xff, %zmmX, %zmmX, %zmmX
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This fixes BZ #28252.
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---
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.../x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_d_log8_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S | 7 +------
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.../fpu/multiarch/svml_d_sincos8_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S | 12 ++----------
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.../fpu/multiarch/svml_s_sincosf16_core_avx512.S | 7 +------
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.../x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S | 7 +------
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10 files changed, 11 insertions(+), 64 deletions(-)
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
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index 24e3b363..07dfed85 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
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@@ -265,7 +265,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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vmovaps %zmm0, %zmm8
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/* Check for large arguments path */
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- vpbroadcastq .L_2il0floatpacket.16(%rip), %zmm2
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+ vpternlogd $0xff, %zmm2, %zmm2, %zmm2
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/*
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ARGUMENT RANGE REDUCTION:
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@@ -456,8 +456,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_cos_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.16:
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- .long 0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.16,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
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index ae8af8d8..ddb60e5b 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
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@@ -274,7 +274,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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/* preserve mantissa, set input exponent to 2^(-10) */
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vpternlogq $248, _ExpMask(%rax), %zmm3, %zmm2
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- vpbroadcastq .L_2il0floatpacket.12(%rip), %zmm1
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+ vpternlogd $0xff, %zmm1, %zmm1, %zmm1
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vpsrlq $32, %zmm4, %zmm6
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/* reciprocal approximation good to at least 11 bits */
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@@ -461,8 +461,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_log_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.12:
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- .long 0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.12,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
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index 2d4b14fd..529c454a 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
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@@ -261,7 +261,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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andq $-64, %rsp
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subq $1280, %rsp
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movq __svml_d_trig_data@GOTPCREL(%rip), %rax
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- vpbroadcastq .L_2il0floatpacket.14(%rip), %zmm14
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+ vpternlogd $0xff, %zmm1, %zmm1, %zmm14
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vmovups __dAbsMask(%rax), %zmm7
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vmovups __dInvPI(%rax), %zmm2
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vmovups __dRShifter(%rax), %zmm1
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@@ -458,8 +458,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
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jmp .LBL_2_7
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#endif
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END (_ZGVeN8v_sin_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.14:
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- .long 0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.14,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
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index 2df626c0..e501a53a 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
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@@ -430,7 +430,7 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
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/* SinPoly = SinR*SinPoly */
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vfmadd213pd %zmm5, %zmm5, %zmm4
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- vpbroadcastq .L_2il0floatpacket.15(%rip), %zmm3
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+ vpternlogd $0xff, %zmm3, %zmm3, %zmm3
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/* Update Cos result's sign */
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vxorpd %zmm2, %zmm1, %zmm1
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@@ -741,8 +741,3 @@ END (_ZGVeN8vvv_sincos_knl)
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ENTRY (_ZGVeN8vvv_sincos_skx)
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WRAPPER_AVX512_vvv_vl8l8 _ZGVeN8vl8l8_sincos_skx
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END (_ZGVeN8vvv_sincos_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.15:
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- .long 0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.15,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
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index 6ea1137b..377af394 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
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@@ -278,7 +278,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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X = X - Y*PI1 - Y*PI2 - Y*PI3
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*/
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vmovaps %zmm0, %zmm6
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- vmovups .L_2il0floatpacket.13(%rip), %zmm12
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+ vpternlogd $0xff, %zmm12, %zmm12, %zmm12
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vmovups __sRShifter(%rax), %zmm3
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vmovups __sPI1_FMA(%rax), %zmm5
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vmovups __sA9_FMA(%rax), %zmm9
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@@ -453,8 +453,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16v_cosf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.13:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.13,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
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index 89ba0df2..46f33d46 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
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@@ -264,7 +264,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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vmovaps %zmm0, %zmm7
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/* compare against threshold */
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- vmovups .L_2il0floatpacket.13(%rip), %zmm3
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+ vpternlogd $0xff, %zmm3, %zmm3, %zmm3
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vmovups __sInvLn2(%rax), %zmm4
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vmovups __sShifter(%rax), %zmm1
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vmovups __sLn2hi(%rax), %zmm6
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@@ -440,8 +440,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
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#endif
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END (_ZGVeN16v_expf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.13:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.13,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
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index 4cf0a96f..9e254956 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
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@@ -235,7 +235,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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andq $-64, %rsp
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subq $1280, %rsp
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movq __svml_slog_data@GOTPCREL(%rip), %rax
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- vmovups .L_2il0floatpacket.7(%rip), %zmm6
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+ vpternlogd $0xff, %zmm6, %zmm6, %zmm6
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vmovups _iBrkValue(%rax), %zmm4
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vmovups _sPoly_7(%rax), %zmm8
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@@ -409,8 +409,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
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#endif
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END (_ZGVeN16v_logf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.7:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.7,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
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index bdcd50af..e8331ba1 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
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@@ -385,7 +385,7 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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vpsrlq $32, %zmm3, %zmm2
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vpmovqd %zmm2, %ymm11
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vcvtps2pd %ymm14, %zmm13
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- vmovups .L_2il0floatpacket.23(%rip), %zmm14
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+ vpternlogd $0xff, %zmm14, %zmm14, %zmm14
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vmovaps %zmm14, %zmm26
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vpandd _ABSMASK(%rax), %zmm1, %zmm8
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vpcmpd $1, _INF(%rax), %zmm8, %k2
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@@ -427,7 +427,7 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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vpmovqd %zmm11, %ymm5
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vpxord %zmm10, %zmm10, %zmm10
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vgatherdpd _Log2Rcp_lookup(%rax,%ymm4), %zmm10{%k3}
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- vpbroadcastq .L_2il0floatpacket.24(%rip), %zmm4
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+ vpternlogd $0xff, %zmm4, %zmm4, %zmm4
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vpxord %zmm11, %zmm11, %zmm11
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vcvtdq2pd %ymm7, %zmm7
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vgatherdpd _Log2Rcp_lookup(%rax,%ymm5), %zmm11{%k1}
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@@ -643,11 +643,3 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16vv_powf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.23:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.23,@object
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-.L_2il0floatpacket.24:
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- .long 0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.24,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
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index 5fa4bc41..1f46f334 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
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@@ -317,7 +317,7 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
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/* Result sign calculations */
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vpternlogd $150, %zmm0, %zmm14, %zmm1
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- vmovups .L_2il0floatpacket.13(%rip), %zmm14
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+ vpternlogd $0xff, %zmm14, %zmm14, %zmm14
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/* Add correction term 0.5 for cos() part */
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vaddps %zmm8, %zmm5, %zmm15
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@@ -748,8 +748,3 @@ END (_ZGVeN16vvv_sincosf_knl)
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ENTRY (_ZGVeN16vvv_sincosf_skx)
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WRAPPER_AVX512_vvv_vl4l4 _ZGVeN16vl4l4_sincosf_skx
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END (_ZGVeN16vvv_sincosf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.13:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.13,@object
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diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
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index 141f747e..1fc9308a 100644
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--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
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+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
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@@ -280,7 +280,7 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
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movq __svml_s_trig_data@GOTPCREL(%rip), %rax
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/* Check for large and special values */
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- vmovups .L_2il0floatpacket.11(%rip), %zmm14
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+ vpternlogd $0xff, %zmm14, %zmm14, %zmm14
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vmovups __sAbsMask(%rax), %zmm5
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vmovups __sInvPI(%rax), %zmm1
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vmovups __sRShifter(%rax), %zmm2
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@@ -472,8 +472,3 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
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jmp .LBL_2_7
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#endif
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END (_ZGVeN16v_sinf_skx)
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-
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- .section .rodata, "a"
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-.L_2il0floatpacket.11:
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- .long 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
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- .type .L_2il0floatpacket.11,@object
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--
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GitLab
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