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								arm64-tegra-fix-pcie.patch
									
									
									
									
									
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							| @ -0,0 +1,101 @@ | ||||
| From 5fc5158c547fc3a2b46cbc6f73b926d8b78cd6e2 Mon Sep 17 00:00:00 2001 | ||||
| From: "Signed-off-by: Jon Hunter" <jonathanh@nvidia.com> | ||||
| Date: Fri, 14 Feb 2020 13:53:53 +0000 | ||||
| Subject: [PATCH] ARM64: tegra: Fix Tegra194 PCIe compatible string | ||||
| 
 | ||||
| If the kernel configuration option CONFIG_PCIE_DW_PLAT_HOST is enabled | ||||
| then this can cause the kernel to incorrectly probe the generic | ||||
| designware PCIe platform driver instead of the Tegra194 designware PCIe | ||||
| driver. This causes a boot failure on Tegra194 because the necessary | ||||
| configuration to access the hardware is not performed. | ||||
| 
 | ||||
| The order in which the compatible strings are populated in Device-Tree | ||||
| is not relevant in this case, because the kernel will attempt to probe | ||||
| the device as soon as a driver is loaded and if the generic designware | ||||
| PCIe driver is loaded first, then this driver will be probed first. | ||||
| Therefore, to fix this problem, remove the "snps,dw-pcie" string from | ||||
| the compatible string as we never want this driver to be probe on | ||||
| Tegra194. | ||||
| 
 | ||||
| Fixes: 2602c32f15e7 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT") | ||||
| 
 | ||||
| Signed-off-by: Jon Hunter <jonathanh@nvidia.com> | ||||
| ---
 | ||||
|  .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt |  2 +- | ||||
|  arch/arm64/boot/dts/nvidia/tegra194.dtsi             | 12 ++++++------ | ||||
|  2 files changed, 7 insertions(+), 7 deletions(-) | ||||
| 
 | ||||
| diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
 | ||||
| index b739f92da58e..1f90eb39870b 100644
 | ||||
| --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
 | ||||
| +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
 | ||||
| @@ -118,7 +118,7 @@ Tegra194:
 | ||||
|  -------- | ||||
|   | ||||
|  	pcie@14180000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>; | ||||
|  		reg = <0x00 0x14180000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x38000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
 | ||||
| index ccac43be12ac..4c58cb10fb9c 100644
 | ||||
| --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
 | ||||
| +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
 | ||||
| @@ -1208,7 +1208,7 @@ sor3: sor@15bc0000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@14100000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; | ||||
|  		reg = <0x00 0x14100000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x30000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| @@ -1253,7 +1253,7 @@ pcie@14100000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@14120000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; | ||||
|  		reg = <0x00 0x14120000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x32000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| @@ -1298,7 +1298,7 @@ pcie@14120000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@14140000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; | ||||
|  		reg = <0x00 0x14140000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x34000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| @@ -1343,7 +1343,7 @@ pcie@14140000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@14160000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>; | ||||
|  		reg = <0x00 0x14160000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x36000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| @@ -1388,7 +1388,7 @@ pcie@14160000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@14180000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>; | ||||
|  		reg = <0x00 0x14180000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x38000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| @@ -1433,7 +1433,7 @@ pcie@14180000 {
 | ||||
|  	}; | ||||
|   | ||||
|  	pcie@141a0000 { | ||||
| -		compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
 | ||||
| +		compatible = "nvidia,tegra194-pcie";
 | ||||
|  		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>; | ||||
|  		reg = <0x00 0x141a0000 0x0 0x00020000   /* appl registers (128K)      */ | ||||
|  		       0x00 0x3a000000 0x0 0x00040000   /* configuration space (256K) */ | ||||
| -- 
 | ||||
| 2.24.1 | ||||
| 
 | ||||
| @ -1 +1 @@ | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
|  | ||||
| @ -1 +1 @@ | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
|  | ||||
| @ -1 +1 @@ | ||||
| # CONFIG_HISI_DMA is not set | ||||
| CONFIG_HISI_DMA=m | ||||
|  | ||||
							
								
								
									
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								configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR
									
									
									
									
									
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								configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR
									
									
									
									
									
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							| @ -0,0 +1 @@ | ||||
| CONFIG_QCOM_CPR=m | ||||
| @ -1 +0,0 @@ | ||||
| # CONFIG_QCOM_SOCINFO is not set | ||||
| @ -0,0 +1 @@ | ||||
| CONFIG_REGULATOR_MP8859=m | ||||
| @ -1 +1 @@ | ||||
| # CONFIG_SPI_QCOM_GENI is not set | ||||
| CONFIG_SPI_QCOM_GENI=m | ||||
|  | ||||
| @ -1 +1 @@ | ||||
| # CONFIG_CRYPTO_DEV_OMAP_AES is not set | ||||
| CONFIG_CRYPTO_DEV_OMAP_AES=m | ||||
|  | ||||
| @ -359,7 +359,7 @@ CONFIG_ARM_GIC_V3=y | ||||
| CONFIG_ARM_GIC=y | ||||
| CONFIG_ARM_GLOBAL_TIMER=y | ||||
| # CONFIG_ARM_IMX6Q_CPUFREQ is not set | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| CONFIG_ARM_IMX_CPUFREQ_DT=m | ||||
| CONFIG_ARM_MHU=m | ||||
| CONFIG_ARM_PL172_MPMC=m | ||||
| @ -1493,7 +1493,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| @ -2292,7 +2292,7 @@ CONFIG_HID_ZEROPLUS=m | ||||
| CONFIG_HID_ZYDACRON=m | ||||
| CONFIG_HIGH_RES_TIMERS=y | ||||
| # CONFIG_HIPPI is not set | ||||
| # CONFIG_HISI_DMA is not set | ||||
| CONFIG_HISI_DMA=m | ||||
| CONFIG_HISILICON_ERRATUM_161010101=y | ||||
| CONFIG_HISILICON_ERRATUM_161600802=y | ||||
| CONFIG_HISILICON_IRQ_MBIGEN=y | ||||
| @ -4889,7 +4889,7 @@ CONFIG_QCOM_CLK_RPMH=y | ||||
| CONFIG_QCOM_CLK_SMD_RPM=m | ||||
| CONFIG_QCOM_COINCELL=m | ||||
| CONFIG_QCOM_COMMAND_DB=y | ||||
| # CONFIG_QCOM_CPR is not set | ||||
| CONFIG_QCOM_CPR=m | ||||
| # CONFIG_QCOM_EBI2 is not set | ||||
| CONFIG_QCOM_EMAC=m | ||||
| # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set | ||||
| @ -4925,7 +4925,7 @@ CONFIG_QCOM_SMD_RPM=m | ||||
| CONFIG_QCOM_SMEM=m | ||||
| CONFIG_QCOM_SMP2P=m | ||||
| CONFIG_QCOM_SMSM=m | ||||
| # CONFIG_QCOM_SOCINFO is not set | ||||
| CONFIG_QCOM_SOCINFO=m | ||||
| CONFIG_QCOM_SPMI_ADC5=m | ||||
| CONFIG_QCOM_SPMI_IADC=m | ||||
| CONFIG_QCOM_SPMI_TEMP_ALARM=m | ||||
| @ -5075,7 +5075,7 @@ CONFIG_REGULATOR_MAX77802=m | ||||
| # CONFIG_REGULATOR_MAX8952 is not set | ||||
| CONFIG_REGULATOR_MAX8973=m | ||||
| # CONFIG_REGULATOR_MCP16502 is not set | ||||
| # CONFIG_REGULATOR_MP8859 is not set | ||||
| CONFIG_REGULATOR_MP8859=m | ||||
| # CONFIG_REGULATOR_MPQ7920 is not set | ||||
| # CONFIG_REGULATOR_MT6311 is not set | ||||
| CONFIG_REGULATOR_PFUZE100=m | ||||
| @ -6317,7 +6317,7 @@ CONFIG_SPI_MESON_SPIFC=m | ||||
| CONFIG_SPI_ORION=m | ||||
| CONFIG_SPI_PL022=m | ||||
| # CONFIG_SPI_PXA2XX is not set | ||||
| # CONFIG_SPI_QCOM_GENI is not set | ||||
| CONFIG_SPI_QCOM_GENI=m | ||||
| CONFIG_SPI_QCOM_QSPI=m | ||||
| CONFIG_SPI_QUP=m | ||||
| CONFIG_SPI_ROCKCHIP=m | ||||
|  | ||||
| @ -359,7 +359,7 @@ CONFIG_ARM_GIC_V3=y | ||||
| CONFIG_ARM_GIC=y | ||||
| CONFIG_ARM_GLOBAL_TIMER=y | ||||
| # CONFIG_ARM_IMX6Q_CPUFREQ is not set | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| CONFIG_ARM_IMX_CPUFREQ_DT=m | ||||
| CONFIG_ARM_MHU=m | ||||
| CONFIG_ARM_PL172_MPMC=m | ||||
| @ -1485,7 +1485,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| @ -2276,7 +2276,7 @@ CONFIG_HID_ZEROPLUS=m | ||||
| CONFIG_HID_ZYDACRON=m | ||||
| CONFIG_HIGH_RES_TIMERS=y | ||||
| # CONFIG_HIPPI is not set | ||||
| # CONFIG_HISI_DMA is not set | ||||
| CONFIG_HISI_DMA=m | ||||
| CONFIG_HISILICON_ERRATUM_161010101=y | ||||
| CONFIG_HISILICON_ERRATUM_161600802=y | ||||
| CONFIG_HISILICON_IRQ_MBIGEN=y | ||||
| @ -4868,7 +4868,7 @@ CONFIG_QCOM_CLK_RPMH=y | ||||
| CONFIG_QCOM_CLK_SMD_RPM=m | ||||
| CONFIG_QCOM_COINCELL=m | ||||
| CONFIG_QCOM_COMMAND_DB=y | ||||
| # CONFIG_QCOM_CPR is not set | ||||
| CONFIG_QCOM_CPR=m | ||||
| # CONFIG_QCOM_EBI2 is not set | ||||
| CONFIG_QCOM_EMAC=m | ||||
| # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set | ||||
| @ -4904,7 +4904,7 @@ CONFIG_QCOM_SMD_RPM=m | ||||
| CONFIG_QCOM_SMEM=m | ||||
| CONFIG_QCOM_SMP2P=m | ||||
| CONFIG_QCOM_SMSM=m | ||||
| # CONFIG_QCOM_SOCINFO is not set | ||||
| CONFIG_QCOM_SOCINFO=m | ||||
| CONFIG_QCOM_SPMI_ADC5=m | ||||
| CONFIG_QCOM_SPMI_IADC=m | ||||
| CONFIG_QCOM_SPMI_TEMP_ALARM=m | ||||
| @ -5054,7 +5054,7 @@ CONFIG_REGULATOR_MAX77802=m | ||||
| # CONFIG_REGULATOR_MAX8952 is not set | ||||
| CONFIG_REGULATOR_MAX8973=m | ||||
| # CONFIG_REGULATOR_MCP16502 is not set | ||||
| # CONFIG_REGULATOR_MP8859 is not set | ||||
| CONFIG_REGULATOR_MP8859=m | ||||
| # CONFIG_REGULATOR_MPQ7920 is not set | ||||
| # CONFIG_REGULATOR_MT6311 is not set | ||||
| CONFIG_REGULATOR_PFUZE100=m | ||||
| @ -6295,7 +6295,7 @@ CONFIG_SPI_MESON_SPIFC=m | ||||
| CONFIG_SPI_ORION=m | ||||
| CONFIG_SPI_PL022=m | ||||
| # CONFIG_SPI_PXA2XX is not set | ||||
| # CONFIG_SPI_QCOM_GENI is not set | ||||
| CONFIG_SPI_QCOM_GENI=m | ||||
| CONFIG_SPI_QCOM_QSPI=m | ||||
| CONFIG_SPI_QUP=m | ||||
| CONFIG_SPI_ROCKCHIP=m | ||||
|  | ||||
| @ -340,7 +340,7 @@ CONFIG_ARM_GLOBAL_TIMER=y | ||||
| CONFIG_ARM_HIGHBANK_CPUFREQ=m | ||||
| # CONFIG_ARM_HIGHBANK_CPUIDLE is not set | ||||
| CONFIG_ARM_IMX6Q_CPUFREQ=m | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| # CONFIG_ARM_IMX_CPUFREQ_DT is not set | ||||
| CONFIG_ARM_KPROBES_TEST=m | ||||
| # CONFIG_ARM_LPAE is not set | ||||
| @ -1176,7 +1176,7 @@ CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y | ||||
| CONFIG_CRYPTO_DEV_MARVELL_CESA=m | ||||
| CONFIG_CRYPTO_DEV_MXS_DCP=m | ||||
| # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set | ||||
| # CONFIG_CRYPTO_DEV_OMAP_AES is not set | ||||
| CONFIG_CRYPTO_DEV_OMAP_AES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_DES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||||
| @ -1483,7 +1483,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
|  | ||||
| @ -340,7 +340,7 @@ CONFIG_ARM_GLOBAL_TIMER=y | ||||
| CONFIG_ARM_HIGHBANK_CPUFREQ=m | ||||
| # CONFIG_ARM_HIGHBANK_CPUIDLE is not set | ||||
| CONFIG_ARM_IMX6Q_CPUFREQ=m | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| # CONFIG_ARM_IMX_CPUFREQ_DT is not set | ||||
| CONFIG_ARM_KPROBES_TEST=m | ||||
| # CONFIG_ARM_LPAE is not set | ||||
| @ -1176,7 +1176,7 @@ CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y | ||||
| CONFIG_CRYPTO_DEV_MARVELL_CESA=m | ||||
| CONFIG_CRYPTO_DEV_MXS_DCP=m | ||||
| # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set | ||||
| # CONFIG_CRYPTO_DEV_OMAP_AES is not set | ||||
| CONFIG_CRYPTO_DEV_OMAP_AES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_DES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||||
| @ -1476,7 +1476,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
|  | ||||
| @ -332,7 +332,7 @@ CONFIG_ARM_GLOBAL_TIMER=y | ||||
| CONFIG_ARM_HIGHBANK_CPUFREQ=m | ||||
| # CONFIG_ARM_HIGHBANK_CPUIDLE is not set | ||||
| # CONFIG_ARM_IMX6Q_CPUFREQ is not set | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| # CONFIG_ARM_IMX_CPUFREQ_DT is not set | ||||
| CONFIG_ARM_KPROBES_TEST=m | ||||
| CONFIG_ARM_LPAE=y | ||||
| @ -1147,7 +1147,7 @@ CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y | ||||
| CONFIG_CRYPTO_DEV_MARVELL_CESA=m | ||||
| # CONFIG_CRYPTO_DEV_MXS_DCP is not set | ||||
| # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set | ||||
| # CONFIG_CRYPTO_DEV_OMAP_AES is not set | ||||
| CONFIG_CRYPTO_DEV_OMAP_AES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_DES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||||
| @ -1451,7 +1451,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
|  | ||||
| @ -332,7 +332,7 @@ CONFIG_ARM_GLOBAL_TIMER=y | ||||
| CONFIG_ARM_HIGHBANK_CPUFREQ=m | ||||
| # CONFIG_ARM_HIGHBANK_CPUIDLE is not set | ||||
| # CONFIG_ARM_IMX6Q_CPUFREQ is not set | ||||
| # CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set | ||||
| CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m | ||||
| # CONFIG_ARM_IMX_CPUFREQ_DT is not set | ||||
| CONFIG_ARM_KPROBES_TEST=m | ||||
| CONFIG_ARM_LPAE=y | ||||
| @ -1147,7 +1147,7 @@ CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y | ||||
| CONFIG_CRYPTO_DEV_MARVELL_CESA=m | ||||
| # CONFIG_CRYPTO_DEV_MXS_DCP is not set | ||||
| # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set | ||||
| # CONFIG_CRYPTO_DEV_OMAP_AES is not set | ||||
| CONFIG_CRYPTO_DEV_OMAP_AES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_DES=m | ||||
| CONFIG_CRYPTO_DEV_OMAP=m | ||||
| CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||||
| @ -1444,7 +1444,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| CONFIG_DRM_ANALOGIX_DP=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
|  | ||||
| @ -1245,7 +1245,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -1236,7 +1236,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -1148,7 +1148,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -1139,7 +1139,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -1154,7 +1154,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| # CONFIG_DRM_AMDGPU is not set | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| # CONFIG_DRM_AST is not set | ||||
|  | ||||
| @ -1145,7 +1145,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| # CONFIG_DRM_AMDGPU is not set | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| # CONFIG_DRM_AST is not set | ||||
|  | ||||
| @ -1283,7 +1283,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -1274,7 +1274,7 @@ CONFIG_DRM_AMDGPU_CIK=y | ||||
| CONFIG_DRM_AMDGPU=m | ||||
| CONFIG_DRM_AMDGPU_SI=y | ||||
| CONFIG_DRM_AMDGPU_USERPTR=y | ||||
| # CONFIG_DRM_ANALOGIX_ANX6345 is not set | ||||
| CONFIG_DRM_ANALOGIX_ANX6345=m | ||||
| CONFIG_DRM_ANALOGIX_ANX78XX=m | ||||
| # CONFIG_DRM_ARCPGU is not set | ||||
| CONFIG_DRM_AST=m | ||||
|  | ||||
| @ -830,6 +830,8 @@ Patch312: bcm2835-irqchip-Quiesce-IRQs-left-enabled-by-bootloader.patch | ||||
| Patch320: arm64-tegra-jetson-tx1-fixes.patch | ||||
| # http://patchwork.ozlabs.org/patch/1230891/ | ||||
| Patch321: arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch | ||||
| # https://lkml.org/lkml/2020/2/14/401 | ||||
| Patch323: arm64-tegra-fix-pcie.patch | ||||
| 
 | ||||
| # Coral | ||||
| Patch330: arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch | ||||
|  | ||||
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