forked from rpms/glibc
145 lines
6.0 KiB
Diff
145 lines
6.0 KiB
Diff
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commit 4fdd4d41a17dda26c854ed935658154a17d4b906
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Author: H.J. Lu <hjl.tools@gmail.com>
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Date: Thu Jun 25 15:12:57 2020 -0700
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x86: Detect Intel Advanced Matrix Extensions
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Intel Advanced Matrix Extensions (Intel AMX) is a new programming
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paradigm consisting of two components: a set of 2-dimensional registers
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(tiles) representing sub-arrays from a larger 2-dimensional memory image,
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and accelerators able to operate on tiles. Intel AMX is an extensible
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architecture. New accelerators can be added and the existing accelerator
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may be enhanced to provide higher performance. The initial features are
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AMX-BF16, AMX-TILE and AMX-INT8, which are usable only if the operating
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system supports both XTILECFG state and XTILEDATA state.
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Add AMX-BF16, AMX-TILE and AMX-INT8 support to HAS_CPU_FEATURE and
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CPU_FEATURE_USABLE.
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diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
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index 7b2a5bc3ed27ec39..21565474839efffc 100644
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--- a/sysdeps/x86/cpu-features.c
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+++ b/sysdeps/x86/cpu-features.c
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@@ -239,6 +239,24 @@ get_common_indices (struct cpu_features *cpu_features,
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}
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}
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+ /* Are XTILECFG and XTILEDATA states usable? */
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+ if ((xcrlow & (bit_XTILECFG_state | bit_XTILEDATA_state))
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+ == (bit_XTILECFG_state | bit_XTILEDATA_state))
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+ {
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+ /* Determine if AMX_BF16 is usable. */
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+ if (CPU_FEATURES_CPU_P (cpu_features, AMX_BF16))
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+ cpu_features->usable[index_arch_AMX_BF16_Usable]
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+ |= bit_arch_AMX_BF16_Usable;
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+ /* Determine if AMX_TILE is usable. */
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+ if (CPU_FEATURES_CPU_P (cpu_features, AMX_TILE))
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+ cpu_features->usable[index_arch_AMX_TILE_Usable]
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+ |= bit_arch_AMX_TILE_Usable;
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+ /* Determine if AMX_INT8 is usable. */
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+ if (CPU_FEATURES_CPU_P (cpu_features, AMX_INT8))
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+ cpu_features->usable[index_arch_AMX_INT8_Usable]
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+ |= bit_arch_AMX_INT8_Usable;
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+ }
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+
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/* For _dl_runtime_resolve, set xsave_state_size to xsave area
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size + integer register save size and align it to 64 bytes. */
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if (cpu_features->basic.max_cpuid >= 0xd)
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diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
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index 41c3855e94d16b49..7c46242aad69d427 100644
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--- a/sysdeps/x86/cpu-features.h
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+++ b/sysdeps/x86/cpu-features.h
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@@ -156,6 +156,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define bit_arch_AVX512_VP2INTERSECT_Usable (1u << 24)
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#define bit_arch_AVX512_BF16_Usable (1u << 25)
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#define bit_arch_PKU_Usable (1u << 26)
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+#define bit_arch_AMX_BF16_Usable (1u << 27)
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+#define bit_arch_AMX_TILE_Usable (1u << 28)
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+#define bit_arch_AMX_INT8_Usable (1u << 29)
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#define index_arch_AVX_Usable USABLE_FEATURE_INDEX_1
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#define index_arch_AVX2_Usable USABLE_FEATURE_INDEX_1
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@@ -184,6 +187,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define index_arch_AVX512_VP2INTERSECT_Usable USABLE_FEATURE_INDEX_1
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#define index_arch_AVX512_BF16_Usable USABLE_FEATURE_INDEX_1
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#define index_arch_PKU_Usable USABLE_FEATURE_INDEX_1
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+#define index_arch_AMX_BF16_Usable USABLE_FEATURE_INDEX_1
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+#define index_arch_AMX_TILE_Usable USABLE_FEATURE_INDEX_1
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+#define index_arch_AMX_INT8_Usable USABLE_FEATURE_INDEX_1
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#define feature_AVX_Usable usable
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#define feature_AVX2_Usable usable
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@@ -212,6 +218,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define feature_AVX512_VP2INTERSECT_Usable usable
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#define feature_AVX512_BF16_Usable usable
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#define feature_PKU_Usable usable
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+#define feature_AMX_BF16_Usable usable
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+#define feature_AMX_TILE_Usable usable
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+#define feature_AMX_INT8_Usable usable
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/* CPU features. */
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@@ -347,6 +356,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define bit_cpu_TSXLDTRK (1u << 16)
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#define bit_cpu_PCONFIG (1u << 18)
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#define bit_cpu_IBT (1u << 20)
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+#define bit_cpu_AMX_BF16 (1u << 22)
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+#define bit_cpu_AMX_TILE (1u << 24)
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+#define bit_cpu_AMX_INT8 (1u << 25)
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#define bit_cpu_IBRS_IBPB (1u << 26)
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#define bit_cpu_STIBP (1u << 27)
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#define bit_cpu_L1D_FLUSH (1u << 28)
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@@ -529,6 +541,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define index_cpu_TSXLDTRK COMMON_CPUID_INDEX_7
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#define index_cpu_PCONFIG COMMON_CPUID_INDEX_7
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#define index_cpu_IBT COMMON_CPUID_INDEX_7
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+#define index_cpu_AMX_BF16 COMMON_CPUID_INDEX_7
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+#define index_cpu_AMX_TILE COMMON_CPUID_INDEX_7
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+#define index_cpu_AMX_INT8 COMMON_CPUID_INDEX_7
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#define index_cpu_IBRS_IBPB COMMON_CPUID_INDEX_7
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#define index_cpu_STIBP COMMON_CPUID_INDEX_7
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#define index_cpu_L1D_FLUSH COMMON_CPUID_INDEX_7
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@@ -711,6 +726,9 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define reg_TSXLDTRK edx
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#define reg_PCONFIG edx
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#define reg_IBT edx
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+#define reg_AMX_BF16 edx
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+#define reg_AMX_TILE edx
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+#define reg_AMX_INT8 edx
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#define reg_IBRS_IBPB edx
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#define reg_STIBP edx
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#define reg_L1D_FLUSH edx
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@@ -819,6 +837,8 @@ extern const struct cpu_features *__get_cpu_features (void)
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#define bit_Opmask_state (1u << 5)
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#define bit_ZMM0_15_state (1u << 6)
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#define bit_ZMM16_31_state (1u << 7)
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+#define bit_XTILECFG_state (1u << 17)
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+#define bit_XTILEDATA_state (1u << 18)
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# if defined (_LIBC) && !IS_IN (nonlib)
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/* Unused for x86. */
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diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
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index 08688ace2a0ae35e..c4d91be3a48de886 100644
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--- a/sysdeps/x86/tst-get-cpu-features.c
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+++ b/sysdeps/x86/tst-get-cpu-features.c
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@@ -185,6 +185,9 @@ do_test (void)
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CHECK_CPU_FEATURE (TSXLDTRK);
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CHECK_CPU_FEATURE (PCONFIG);
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CHECK_CPU_FEATURE (IBT);
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+ CHECK_CPU_FEATURE (AMX_BF16);
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+ CHECK_CPU_FEATURE (AMX_TILE);
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+ CHECK_CPU_FEATURE (AMX_INT8);
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CHECK_CPU_FEATURE (IBRS_IBPB);
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CHECK_CPU_FEATURE (STIBP);
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CHECK_CPU_FEATURE (L1D_FLUSH);
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@@ -237,6 +240,9 @@ do_test (void)
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CHECK_CPU_FEATURE_USABLE (AVX512_4VNNIW);
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CHECK_CPU_FEATURE_USABLE (AVX512_4FMAPS);
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CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT);
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+ CHECK_CPU_FEATURE_USABLE (AMX_BF16);
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+ CHECK_CPU_FEATURE_USABLE (AMX_TILE);
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+ CHECK_CPU_FEATURE_USABLE (AMX_INT8);
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CHECK_CPU_FEATURE_USABLE (XOP);
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CHECK_CPU_FEATURE_USABLE (FMA4);
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CHECK_CPU_FEATURE_USABLE (XSAVEC);
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