forked from rpms/libvirt
273 lines
11 KiB
Diff
273 lines
11 KiB
Diff
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From 5b5f684bfceeed923e1733931b6c4c75d5ed4149 Mon Sep 17 00:00:00 2001
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Message-Id: <5b5f684bfceeed923e1733931b6c4c75d5ed4149@dist-git>
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From: Jiri Denemark <jdenemar@redhat.com>
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Date: Fri, 29 Apr 2022 10:35:02 +0200
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Subject: [PATCH] cpu_x86: Ignore enabled features for input models in
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x86DecodeUseCandidate
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While we don't want to aim for the shortest list of disabled features in
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the baseline result (it would select a very old model), we want to do so
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while looking at any of the input models for which we're trying to
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compute a baseline CPU model. Given a set of input models, we always
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want to take the least capable one of them (i.e., the one with shortest
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list of disabled features) or a better model which is not one of the
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input models.
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So when considering an input model, we just check whether its list of
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disabled features is shorter than the currently best one. When looking
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at other models we check both enabled and disabled features while
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penalizing disabled features as implemented by the previous patch.
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
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(cherry picked from commit bb6cedd2082599323257ee0df18c93a6e0551b0b)
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https://bugzilla.redhat.com/show_bug.cgi?id=2084030
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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---
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src/cpu/cpu_x86.c | 66 ++++++++++++-------
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...4-baseline-Westmere+Nehalem-migratable.xml | 8 ++-
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...86_64-baseline-Westmere+Nehalem-result.xml | 8 ++-
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...-cpuid-baseline-Cooperlake+Cascadelake.xml | 13 ++--
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4 files changed, 64 insertions(+), 31 deletions(-)
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diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
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index ebcd96edb1..7b59dad8bf 100644
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--- a/src/cpu/cpu_x86.c
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+++ b/src/cpu/cpu_x86.c
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@@ -1975,7 +1975,8 @@ virCPUx86Compare(virCPUDef *host,
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static int
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virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent,
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- virCPUDef *cpuCandidate)
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+ virCPUDef *cpuCandidate,
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+ bool isPreferred)
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{
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size_t current = cpuCurrent->nfeatures;
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size_t enabledCurrent = current;
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@@ -2017,6 +2018,14 @@ virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent,
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return 1;
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}
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+ if (isPreferred && disabled < disabledCurrent) {
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+ VIR_DEBUG("%s is in the list of preferred models and provides fewer "
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+ "disabled features than %s: %zu < %zu",
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+ cpuCandidate->model, cpuCurrent->model,
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+ disabled, disabledCurrent);
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+ return 1;
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+ }
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+
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VIR_DEBUG("%s is not better than %s: %zu (%zu, %zu) >= %zu (%zu, %zu)",
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cpuCandidate->model, cpuCurrent->model,
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candidate, enabled, disabled,
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@@ -2039,8 +2048,10 @@ x86DecodeUseCandidate(virCPUx86Model *current,
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virCPUx86Model *candidate,
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virCPUDef *cpuCandidate,
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uint32_t signature,
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- const char *preferred)
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+ const char **preferred)
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{
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+ bool isPreferred = false;
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+
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if (cpuCandidate->type == VIR_CPU_TYPE_HOST &&
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!candidate->decodeHost) {
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VIR_DEBUG("%s is not supposed to be used for host CPU definition",
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@@ -2064,9 +2075,13 @@ x86DecodeUseCandidate(virCPUx86Model *current,
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}
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}
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- if (preferred && STREQ(cpuCandidate->model, preferred)) {
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- VIR_DEBUG("%s is the preferred model", cpuCandidate->model);
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- return 2;
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+ if (preferred) {
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+ isPreferred = g_strv_contains(preferred, cpuCandidate->model);
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+
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+ if (isPreferred && !preferred[1]) {
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+ VIR_DEBUG("%s is the preferred model", cpuCandidate->model);
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+ return 2;
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+ }
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}
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if (!cpuCurrent) {
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@@ -2093,7 +2108,8 @@ x86DecodeUseCandidate(virCPUx86Model *current,
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}
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}
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- return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate);
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+ return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate,
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+ isPreferred);
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}
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@@ -2136,7 +2152,7 @@ static int
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x86Decode(virCPUDef *cpu,
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const virCPUx86Data *cpuData,
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virDomainCapsCPUModels *models,
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- const char *preferred,
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+ const char **preferred,
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bool migratable)
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{
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virCPUx86Map *map;
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@@ -2169,6 +2185,9 @@ x86Decode(virCPUDef *cpu,
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x86DataFilterTSX(&data, vendor, map);
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+ if (preferred && !preferred[0])
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+ preferred = NULL;
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+
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/* Walk through the CPU models in reverse order to check newest
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* models first.
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*/
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@@ -2176,16 +2195,18 @@ x86Decode(virCPUDef *cpu,
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candidate = map->models[i];
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if (models &&
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!(hvModel = virDomainCapsCPUModelsGet(models, candidate->name))) {
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- if (preferred && STREQ(candidate->name, preferred)) {
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+ if (preferred &&
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+ !preferred[1] &&
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+ STREQ(candidate->name, preferred[0])) {
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if (cpu->fallback != VIR_CPU_FALLBACK_ALLOW) {
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virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
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_("CPU model %s is not supported by hypervisor"),
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- preferred);
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+ preferred[0]);
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return -1;
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} else {
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VIR_WARN("Preferred CPU model %s not allowed by"
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" hypervisor; closest supported model will be"
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- " used", preferred);
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+ " used", preferred[0]);
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}
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} else {
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VIR_DEBUG("CPU model %s not allowed by hypervisor; ignoring",
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@@ -2793,8 +2814,8 @@ virCPUx86Baseline(virCPUDef **cpus,
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size_t i;
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virCPUx86Vendor *vendor = NULL;
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bool outputVendor = true;
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- const char *modelName;
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- bool matchingNames = true;
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+ g_autofree char **modelNames = NULL;
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+ size_t namesLen = 0;
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g_autoptr(virCPUData) featData = NULL;
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if (!(map = virCPUx86GetMap()))
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@@ -2816,19 +2837,17 @@ virCPUx86Baseline(virCPUDef **cpus,
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return NULL;
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}
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- modelName = cpus[0]->model;
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+ modelNames = g_new0(char *, ncpus + 1);
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+ if (cpus[0]->model)
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+ modelNames[namesLen++] = cpus[0]->model;
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+
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for (i = 1; i < ncpus; i++) {
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g_autoptr(virCPUx86Model) model = NULL;
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const char *vn = NULL;
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- if (matchingNames && cpus[i]->model) {
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- if (!modelName) {
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- modelName = cpus[i]->model;
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- } else if (STRNEQ(modelName, cpus[i]->model)) {
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- modelName = NULL;
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- matchingNames = false;
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- }
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- }
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+ if (cpus[i]->model &&
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+ !g_strv_contains((const char **) modelNames, cpus[i]->model))
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+ modelNames[namesLen++] = cpus[i]->model;
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if (!(model = x86ModelFromCPU(cpus[i], map, -1)))
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return NULL;
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@@ -2891,10 +2910,11 @@ virCPUx86Baseline(virCPUDef **cpus,
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virCPUx86DataAddItem(&base_model->data, &vendor->data) < 0)
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return NULL;
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- if (x86Decode(cpu, &base_model->data, models, modelName, migratable) < 0)
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+ if (x86Decode(cpu, &base_model->data, models,
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+ (const char **) modelNames, migratable) < 0)
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return NULL;
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- if (STREQ_NULLABLE(cpu->model, modelName))
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+ if (namesLen == 1 && STREQ(cpu->model, modelNames[0]))
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cpu->fallback = VIR_CPU_FALLBACK_FORBID;
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if (!outputVendor)
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diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml
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index 775a27de2e..f5846b1619 100644
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--- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml
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+++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml
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@@ -1,10 +1,14 @@
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<cpu mode='custom' match='exact'>
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- <model fallback='allow'>SandyBridge</model>
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+ <model fallback='allow'>Westmere</model>
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<vendor>Intel</vendor>
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<feature policy='require' name='vme'/>
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<feature policy='require' name='ss'/>
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+ <feature policy='require' name='pclmuldq'/>
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<feature policy='require' name='pcid'/>
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+ <feature policy='require' name='x2apic'/>
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+ <feature policy='require' name='tsc-deadline'/>
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+ <feature policy='require' name='xsave'/>
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<feature policy='require' name='osxsave'/>
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+ <feature policy='require' name='avx'/>
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<feature policy='require' name='hypervisor'/>
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- <feature policy='disable' name='rdtscp'/>
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</cpu>
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diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml
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index cafca97d62..166833276c 100644
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--- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml
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+++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml
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@@ -1,11 +1,15 @@
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<cpu mode='custom' match='exact'>
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- <model fallback='allow'>SandyBridge</model>
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+ <model fallback='allow'>Westmere</model>
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<vendor>Intel</vendor>
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<feature policy='require' name='vme'/>
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<feature policy='require' name='ss'/>
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+ <feature policy='require' name='pclmuldq'/>
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<feature policy='require' name='pcid'/>
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+ <feature policy='require' name='x2apic'/>
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+ <feature policy='require' name='tsc-deadline'/>
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+ <feature policy='require' name='xsave'/>
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<feature policy='require' name='osxsave'/>
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+ <feature policy='require' name='avx'/>
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<feature policy='require' name='hypervisor'/>
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<feature policy='require' name='invtsc'/>
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- <feature policy='disable' name='rdtscp'/>
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</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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index 46c32c996f..ecac749b97 100644
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--- a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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+++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml
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@@ -1,17 +1,22 @@
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<cpu mode='custom' match='exact'>
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- <model fallback='allow'>Cooperlake</model>
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+ <model fallback='allow'>Cascadelake-Server</model>
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<vendor>Intel</vendor>
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<feature policy='require' name='ss'/>
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<feature policy='require' name='vmx'/>
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<feature policy='require' name='hypervisor'/>
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<feature policy='require' name='tsc_adjust'/>
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- <feature policy='require' name='mpx'/>
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<feature policy='require' name='umip'/>
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+ <feature policy='require' name='pku'/>
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<feature policy='require' name='md-clear'/>
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+ <feature policy='require' name='stibp'/>
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+ <feature policy='require' name='arch-capabilities'/>
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<feature policy='require' name='xsaves'/>
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<feature policy='require' name='ibpb'/>
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<feature policy='require' name='amd-ssbd'/>
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+ <feature policy='require' name='rdctl-no'/>
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+ <feature policy='require' name='ibrs-all'/>
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+ <feature policy='require' name='skip-l1dfl-vmentry'/>
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+ <feature policy='require' name='mds-no'/>
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+ <feature policy='require' name='pschange-mc-no'/>
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<feature policy='require' name='tsx-ctrl'/>
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- <feature policy='disable' name='avx512-bf16'/>
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- <feature policy='disable' name='taa-no'/>
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</cpu>
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--
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2.35.1
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