From 90e31b40fd861dcbba080ff56f2faedece39fa1a Mon Sep 17 00:00:00 2001 From: eabdullin Date: Tue, 21 Jan 2025 16:29:53 +0300 Subject: [PATCH] Update config --- config.yaml | 9 ++++++ files/glibc-upstream-2.39-bz-32470.patch | 36 ++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 files/glibc-upstream-2.39-bz-32470.patch diff --git a/config.yaml b/config.yaml index 508d653..4557d4b 100644 --- a/config.yaml +++ b/config.yaml @@ -18,3 +18,12 @@ actions: email: "eabdullin@almalinux.org" line: - "Overwrite target for x86_64_v2" + - name: "Koichiro Iwao" + email: "meta@almalinux.org" + line: + - "Apply patch from upstream BZ #32470" + + - add_files: + - type: "patch" + name: "glibc-upstream-2.39-bz-32470.patch" + number: 1000 diff --git a/files/glibc-upstream-2.39-bz-32470.patch b/files/glibc-upstream-2.39-bz-32470.patch new file mode 100644 index 0000000..a28ce33 --- /dev/null +++ b/files/glibc-upstream-2.39-bz-32470.patch @@ -0,0 +1,36 @@ +From 2c8a7f14fac3628b6a06cc76cdfda54a7ac20386 Mon Sep 17 00:00:00 2001 +From: Florian Weimer +Date: Tue, 17 Dec 2024 18:12:03 +0100 +Subject: [PATCH] x86: Avoid integer truncation with large cache sizes (bug + 32470) + +Some hypervisors report 1 TiB L3 cache size. This results +in some variables incorrectly getting zeroed, causing crashes +in memcpy/memmove because invariants are violated. + +(cherry picked from commit 61c3450db96dce96ad2b24b4f0b548e6a46d68e5) +--- + sysdeps/x86/dl-cacheinfo.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h +index 5a98f70364..1f68968a9a 100644 +--- a/sysdeps/x86/dl-cacheinfo.h ++++ b/sysdeps/x86/dl-cacheinfo.h +@@ -959,11 +959,11 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) + non_temporal_threshold = maximum_non_temporal_threshold; + + /* NB: The REP MOVSB threshold must be greater than VEC_SIZE * 8. */ +- unsigned int minimum_rep_movsb_threshold; ++ unsigned long int minimum_rep_movsb_threshold; + /* NB: The default REP MOVSB threshold is 4096 * (VEC_SIZE / 16) for + VEC_SIZE == 64 or 32. For VEC_SIZE == 16, the default REP MOVSB + threshold is 2048 * (VEC_SIZE / 16). */ +- unsigned int rep_movsb_threshold; ++ unsigned long int rep_movsb_threshold; + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F) + && !CPU_FEATURE_PREFERRED_P (cpu_features, Prefer_No_AVX512)) + { +-- +2.46.2 +