505 lines
15 KiB
C
505 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* pmbus.h - Common defines and structures for PMBus devices
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*
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* Copyright (c) 2010, 2011 Ericsson AB.
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* Copyright (c) 2012 Guenter Roeck
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*/
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#ifndef PMBUS_H
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#define PMBUS_H
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#include <linux/bitops.h>
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#include <linux/regulator/driver.h>
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/*
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* Registers
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*/
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enum pmbus_regs {
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PMBUS_PAGE = 0x00,
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PMBUS_OPERATION = 0x01,
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PMBUS_ON_OFF_CONFIG = 0x02,
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PMBUS_CLEAR_FAULTS = 0x03,
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PMBUS_PHASE = 0x04,
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PMBUS_WRITE_PROTECT = 0x10,
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PMBUS_CAPABILITY = 0x19,
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PMBUS_QUERY = 0x1A,
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PMBUS_VOUT_MODE = 0x20,
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PMBUS_VOUT_COMMAND = 0x21,
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PMBUS_VOUT_TRIM = 0x22,
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PMBUS_VOUT_CAL_OFFSET = 0x23,
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PMBUS_VOUT_MAX = 0x24,
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PMBUS_VOUT_MARGIN_HIGH = 0x25,
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PMBUS_VOUT_MARGIN_LOW = 0x26,
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PMBUS_VOUT_TRANSITION_RATE = 0x27,
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PMBUS_VOUT_DROOP = 0x28,
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PMBUS_VOUT_SCALE_LOOP = 0x29,
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PMBUS_VOUT_SCALE_MONITOR = 0x2A,
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PMBUS_COEFFICIENTS = 0x30,
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PMBUS_POUT_MAX = 0x31,
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PMBUS_FAN_CONFIG_12 = 0x3A,
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PMBUS_FAN_COMMAND_1 = 0x3B,
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PMBUS_FAN_COMMAND_2 = 0x3C,
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PMBUS_FAN_CONFIG_34 = 0x3D,
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PMBUS_FAN_COMMAND_3 = 0x3E,
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PMBUS_FAN_COMMAND_4 = 0x3F,
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PMBUS_VOUT_OV_FAULT_LIMIT = 0x40,
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PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41,
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PMBUS_VOUT_OV_WARN_LIMIT = 0x42,
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PMBUS_VOUT_UV_WARN_LIMIT = 0x43,
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PMBUS_VOUT_UV_FAULT_LIMIT = 0x44,
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PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45,
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PMBUS_IOUT_OC_FAULT_LIMIT = 0x46,
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PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47,
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PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48,
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PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49,
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PMBUS_IOUT_OC_WARN_LIMIT = 0x4A,
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PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B,
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PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C,
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PMBUS_OT_FAULT_LIMIT = 0x4F,
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PMBUS_OT_FAULT_RESPONSE = 0x50,
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PMBUS_OT_WARN_LIMIT = 0x51,
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PMBUS_UT_WARN_LIMIT = 0x52,
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PMBUS_UT_FAULT_LIMIT = 0x53,
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PMBUS_UT_FAULT_RESPONSE = 0x54,
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PMBUS_VIN_OV_FAULT_LIMIT = 0x55,
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PMBUS_VIN_OV_FAULT_RESPONSE = 0x56,
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PMBUS_VIN_OV_WARN_LIMIT = 0x57,
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PMBUS_VIN_UV_WARN_LIMIT = 0x58,
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PMBUS_VIN_UV_FAULT_LIMIT = 0x59,
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PMBUS_IIN_OC_FAULT_LIMIT = 0x5B,
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PMBUS_IIN_OC_WARN_LIMIT = 0x5D,
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PMBUS_POUT_OP_FAULT_LIMIT = 0x68,
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PMBUS_POUT_OP_WARN_LIMIT = 0x6A,
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PMBUS_PIN_OP_WARN_LIMIT = 0x6B,
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PMBUS_STATUS_BYTE = 0x78,
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PMBUS_STATUS_WORD = 0x79,
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PMBUS_STATUS_VOUT = 0x7A,
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PMBUS_STATUS_IOUT = 0x7B,
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PMBUS_STATUS_INPUT = 0x7C,
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PMBUS_STATUS_TEMPERATURE = 0x7D,
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PMBUS_STATUS_CML = 0x7E,
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PMBUS_STATUS_OTHER = 0x7F,
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PMBUS_STATUS_MFR_SPECIFIC = 0x80,
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PMBUS_STATUS_FAN_12 = 0x81,
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PMBUS_STATUS_FAN_34 = 0x82,
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PMBUS_READ_VIN = 0x88,
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PMBUS_READ_IIN = 0x89,
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PMBUS_READ_VCAP = 0x8A,
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PMBUS_READ_VOUT = 0x8B,
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PMBUS_READ_IOUT = 0x8C,
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PMBUS_READ_TEMPERATURE_1 = 0x8D,
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PMBUS_READ_TEMPERATURE_2 = 0x8E,
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PMBUS_READ_TEMPERATURE_3 = 0x8F,
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PMBUS_READ_FAN_SPEED_1 = 0x90,
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PMBUS_READ_FAN_SPEED_2 = 0x91,
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PMBUS_READ_FAN_SPEED_3 = 0x92,
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PMBUS_READ_FAN_SPEED_4 = 0x93,
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PMBUS_READ_DUTY_CYCLE = 0x94,
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PMBUS_READ_FREQUENCY = 0x95,
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PMBUS_READ_POUT = 0x96,
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PMBUS_READ_PIN = 0x97,
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PMBUS_REVISION = 0x98,
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PMBUS_MFR_ID = 0x99,
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PMBUS_MFR_MODEL = 0x9A,
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PMBUS_MFR_REVISION = 0x9B,
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PMBUS_MFR_LOCATION = 0x9C,
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PMBUS_MFR_DATE = 0x9D,
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PMBUS_MFR_SERIAL = 0x9E,
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PMBUS_MFR_VIN_MIN = 0xA0,
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PMBUS_MFR_VIN_MAX = 0xA1,
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PMBUS_MFR_IIN_MAX = 0xA2,
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PMBUS_MFR_PIN_MAX = 0xA3,
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PMBUS_MFR_VOUT_MIN = 0xA4,
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PMBUS_MFR_VOUT_MAX = 0xA5,
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PMBUS_MFR_IOUT_MAX = 0xA6,
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PMBUS_MFR_POUT_MAX = 0xA7,
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PMBUS_IC_DEVICE_ID = 0xAD,
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PMBUS_IC_DEVICE_REV = 0xAE,
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PMBUS_MFR_MAX_TEMP_1 = 0xC0,
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PMBUS_MFR_MAX_TEMP_2 = 0xC1,
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PMBUS_MFR_MAX_TEMP_3 = 0xC2,
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/*
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* Virtual registers.
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* Useful to support attributes which are not supported by standard PMBus
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* registers but exist as manufacturer specific registers on individual chips.
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* Must be mapped to real registers in device specific code.
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*
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* Semantics:
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* Virtual registers are all word size.
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* READ registers are read-only; writes are either ignored or return an error.
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* RESET registers are read/write. Reading reset registers returns zero
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* (used for detection), writing any value causes the associated history to be
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* reset.
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* Virtual registers have to be handled in device specific driver code. Chip
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* driver code returns non-negative register values if a virtual register is
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* supported, or a negative error code if not. The chip driver may return
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* -ENODATA or any other error code in this case, though an error code other
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* than -ENODATA is handled more efficiently and thus preferred. Either case,
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* the calling PMBus core code will abort if the chip driver returns an error
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* code when reading or writing virtual registers.
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*/
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PMBUS_VIRT_BASE = 0x100,
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PMBUS_VIRT_READ_TEMP_AVG,
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PMBUS_VIRT_READ_TEMP_MIN,
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PMBUS_VIRT_READ_TEMP_MAX,
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PMBUS_VIRT_RESET_TEMP_HISTORY,
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PMBUS_VIRT_READ_VIN_AVG,
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PMBUS_VIRT_READ_VIN_MIN,
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PMBUS_VIRT_READ_VIN_MAX,
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PMBUS_VIRT_RESET_VIN_HISTORY,
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PMBUS_VIRT_READ_IIN_AVG,
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PMBUS_VIRT_READ_IIN_MIN,
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PMBUS_VIRT_READ_IIN_MAX,
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PMBUS_VIRT_RESET_IIN_HISTORY,
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PMBUS_VIRT_READ_PIN_AVG,
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PMBUS_VIRT_READ_PIN_MIN,
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PMBUS_VIRT_READ_PIN_MAX,
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PMBUS_VIRT_RESET_PIN_HISTORY,
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PMBUS_VIRT_READ_POUT_AVG,
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PMBUS_VIRT_READ_POUT_MIN,
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PMBUS_VIRT_READ_POUT_MAX,
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PMBUS_VIRT_RESET_POUT_HISTORY,
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PMBUS_VIRT_READ_VOUT_AVG,
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PMBUS_VIRT_READ_VOUT_MIN,
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PMBUS_VIRT_READ_VOUT_MAX,
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PMBUS_VIRT_RESET_VOUT_HISTORY,
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PMBUS_VIRT_READ_IOUT_AVG,
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PMBUS_VIRT_READ_IOUT_MIN,
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PMBUS_VIRT_READ_IOUT_MAX,
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PMBUS_VIRT_RESET_IOUT_HISTORY,
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PMBUS_VIRT_READ_TEMP2_AVG,
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PMBUS_VIRT_READ_TEMP2_MIN,
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PMBUS_VIRT_READ_TEMP2_MAX,
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PMBUS_VIRT_RESET_TEMP2_HISTORY,
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PMBUS_VIRT_READ_VMON,
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PMBUS_VIRT_VMON_UV_WARN_LIMIT,
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PMBUS_VIRT_VMON_OV_WARN_LIMIT,
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PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
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PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
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PMBUS_VIRT_STATUS_VMON,
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/*
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* RPM and PWM Fan control
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*
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* Drivers wanting to expose PWM control must define the behaviour of
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* PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
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* {read,write}_word_data callback.
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*
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* pmbus core provides a default implementation for
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* PMBUS_VIRT_FAN_TARGET_[1-4].
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*
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* TARGET, PWM and PWM_ENABLE members must be defined sequentially;
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* pmbus core uses the difference between the provided register and
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* it's _1 counterpart to calculate the FAN/PWM ID.
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*/
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PMBUS_VIRT_FAN_TARGET_1,
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PMBUS_VIRT_FAN_TARGET_2,
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PMBUS_VIRT_FAN_TARGET_3,
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PMBUS_VIRT_FAN_TARGET_4,
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PMBUS_VIRT_PWM_1,
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PMBUS_VIRT_PWM_2,
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PMBUS_VIRT_PWM_3,
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PMBUS_VIRT_PWM_4,
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PMBUS_VIRT_PWM_ENABLE_1,
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PMBUS_VIRT_PWM_ENABLE_2,
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PMBUS_VIRT_PWM_ENABLE_3,
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PMBUS_VIRT_PWM_ENABLE_4,
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/* Samples for average
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*
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* Drivers wanting to expose functionality for changing the number of
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* samples used for average values should implement support in
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* {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
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* applies to all types of measurements, or any number of specific
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* PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
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*/
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PMBUS_VIRT_SAMPLES,
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PMBUS_VIRT_IN_SAMPLES,
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PMBUS_VIRT_CURR_SAMPLES,
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PMBUS_VIRT_POWER_SAMPLES,
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PMBUS_VIRT_TEMP_SAMPLES,
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};
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/*
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* OPERATION
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*/
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#define PB_OPERATION_CONTROL_ON BIT(7)
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/*
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* WRITE_PROTECT
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*/
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#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */
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#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */
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#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
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#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
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/*
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* CAPABILITY
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*/
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#define PB_CAPABILITY_SMBALERT BIT(4)
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#define PB_CAPABILITY_ERROR_CHECK BIT(7)
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/*
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* VOUT_MODE
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*/
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#define PB_VOUT_MODE_MODE_MASK 0xe0
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#define PB_VOUT_MODE_PARAM_MASK 0x1f
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#define PB_VOUT_MODE_LINEAR 0x00
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#define PB_VOUT_MODE_VID 0x20
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#define PB_VOUT_MODE_DIRECT 0x40
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/*
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* Fan configuration
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*/
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#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1))
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#define PB_FAN_2_RPM BIT(2)
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#define PB_FAN_2_INSTALLED BIT(3)
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#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5))
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#define PB_FAN_1_RPM BIT(6)
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#define PB_FAN_1_INSTALLED BIT(7)
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enum pmbus_fan_mode { percent = 0, rpm };
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/*
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* STATUS_BYTE, STATUS_WORD (lower)
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*/
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#define PB_STATUS_NONE_ABOVE BIT(0)
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#define PB_STATUS_CML BIT(1)
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#define PB_STATUS_TEMPERATURE BIT(2)
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#define PB_STATUS_VIN_UV BIT(3)
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#define PB_STATUS_IOUT_OC BIT(4)
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#define PB_STATUS_VOUT_OV BIT(5)
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#define PB_STATUS_OFF BIT(6)
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#define PB_STATUS_BUSY BIT(7)
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/*
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* STATUS_WORD (upper)
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*/
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#define PB_STATUS_UNKNOWN BIT(8)
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#define PB_STATUS_OTHER BIT(9)
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#define PB_STATUS_FANS BIT(10)
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#define PB_STATUS_POWER_GOOD_N BIT(11)
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#define PB_STATUS_WORD_MFR BIT(12)
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#define PB_STATUS_INPUT BIT(13)
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#define PB_STATUS_IOUT_POUT BIT(14)
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#define PB_STATUS_VOUT BIT(15)
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/*
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* STATUS_IOUT
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*/
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#define PB_POUT_OP_WARNING BIT(0)
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#define PB_POUT_OP_FAULT BIT(1)
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#define PB_POWER_LIMITING BIT(2)
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#define PB_CURRENT_SHARE_FAULT BIT(3)
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#define PB_IOUT_UC_FAULT BIT(4)
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#define PB_IOUT_OC_WARNING BIT(5)
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#define PB_IOUT_OC_LV_FAULT BIT(6)
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#define PB_IOUT_OC_FAULT BIT(7)
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/*
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* STATUS_VOUT, STATUS_INPUT
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*/
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#define PB_VOLTAGE_UV_FAULT BIT(4)
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#define PB_VOLTAGE_UV_WARNING BIT(5)
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#define PB_VOLTAGE_OV_WARNING BIT(6)
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#define PB_VOLTAGE_OV_FAULT BIT(7)
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/*
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* STATUS_INPUT
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*/
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#define PB_PIN_OP_WARNING BIT(0)
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#define PB_IIN_OC_WARNING BIT(1)
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#define PB_IIN_OC_FAULT BIT(2)
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/*
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* STATUS_TEMPERATURE
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*/
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#define PB_TEMP_UT_FAULT BIT(4)
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#define PB_TEMP_UT_WARNING BIT(5)
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#define PB_TEMP_OT_WARNING BIT(6)
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#define PB_TEMP_OT_FAULT BIT(7)
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/*
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* STATUS_FAN
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*/
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#define PB_FAN_AIRFLOW_WARNING BIT(0)
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#define PB_FAN_AIRFLOW_FAULT BIT(1)
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#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2)
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#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3)
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#define PB_FAN_FAN2_WARNING BIT(4)
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#define PB_FAN_FAN1_WARNING BIT(5)
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#define PB_FAN_FAN2_FAULT BIT(6)
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#define PB_FAN_FAN1_FAULT BIT(7)
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/*
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* CML_FAULT_STATUS
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*/
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#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0)
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#define PB_CML_FAULT_OTHER_COMM BIT(1)
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#define PB_CML_FAULT_PROCESSOR BIT(3)
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#define PB_CML_FAULT_MEMORY BIT(4)
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#define PB_CML_FAULT_PACKET_ERROR BIT(5)
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#define PB_CML_FAULT_INVALID_DATA BIT(6)
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#define PB_CML_FAULT_INVALID_COMMAND BIT(7)
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enum pmbus_sensor_classes {
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PSC_VOLTAGE_IN = 0,
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PSC_VOLTAGE_OUT,
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PSC_CURRENT_IN,
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PSC_CURRENT_OUT,
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PSC_POWER,
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PSC_TEMPERATURE,
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PSC_FAN,
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PSC_PWM,
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PSC_NUM_CLASSES /* Number of power sensor classes */
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};
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#define PMBUS_PAGES 32 /* Per PMBus specification */
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#define PMBUS_PHASES 10 /* Maximum number of phases per page */
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/* Functionality bit mask */
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#define PMBUS_HAVE_VIN BIT(0)
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#define PMBUS_HAVE_VCAP BIT(1)
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#define PMBUS_HAVE_VOUT BIT(2)
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#define PMBUS_HAVE_IIN BIT(3)
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#define PMBUS_HAVE_IOUT BIT(4)
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#define PMBUS_HAVE_PIN BIT(5)
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#define PMBUS_HAVE_POUT BIT(6)
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#define PMBUS_HAVE_FAN12 BIT(7)
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#define PMBUS_HAVE_FAN34 BIT(8)
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#define PMBUS_HAVE_TEMP BIT(9)
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#define PMBUS_HAVE_TEMP2 BIT(10)
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#define PMBUS_HAVE_TEMP3 BIT(11)
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#define PMBUS_HAVE_STATUS_VOUT BIT(12)
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#define PMBUS_HAVE_STATUS_IOUT BIT(13)
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#define PMBUS_HAVE_STATUS_INPUT BIT(14)
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#define PMBUS_HAVE_STATUS_TEMP BIT(15)
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#define PMBUS_HAVE_STATUS_FAN12 BIT(16)
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#define PMBUS_HAVE_STATUS_FAN34 BIT(17)
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#define PMBUS_HAVE_VMON BIT(18)
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#define PMBUS_HAVE_STATUS_VMON BIT(19)
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#define PMBUS_HAVE_PWM12 BIT(20)
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#define PMBUS_HAVE_PWM34 BIT(21)
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#define PMBUS_HAVE_SAMPLES BIT(22)
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#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */
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#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */
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enum pmbus_data_format { linear = 0, direct, vid };
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enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
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struct pmbus_driver_info {
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int pages; /* Total number of pages */
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u8 phases[PMBUS_PAGES]; /* Number of phases per page */
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enum pmbus_data_format format[PSC_NUM_CLASSES];
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enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
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/*
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* Support one set of coefficients for each sensor type
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* Used for chips providing data in direct mode.
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*/
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int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */
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int b[PSC_NUM_CLASSES]; /* offset */
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int R[PSC_NUM_CLASSES]; /* exponent */
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u32 func[PMBUS_PAGES]; /* Functionality, per page */
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u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
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/*
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* The following functions map manufacturing specific register values
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* to PMBus standard register values. Specify only if mapping is
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* necessary.
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* Functions return the register value (read) or zero (write) if
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* successful. A return value of -ENODATA indicates that there is no
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* manufacturer specific register, but that a standard PMBus register
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* may exist. Any other negative return value indicates that the
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* register does not exist, and that no attempt should be made to read
|
|
* the standard register.
|
|
*/
|
|
int (*read_byte_data)(struct i2c_client *client, int page, int reg);
|
|
int (*read_word_data)(struct i2c_client *client, int page, int phase,
|
|
int reg);
|
|
int (*write_word_data)(struct i2c_client *client, int page, int reg,
|
|
u16 word);
|
|
int (*write_byte)(struct i2c_client *client, int page, u8 value);
|
|
/*
|
|
* The identify function determines supported PMBus functionality.
|
|
* This function is only necessary if a chip driver supports multiple
|
|
* chips, and the chip functionality is not pre-determined.
|
|
*/
|
|
int (*identify)(struct i2c_client *client,
|
|
struct pmbus_driver_info *info);
|
|
|
|
/* Regulator functionality, if supported by this chip driver. */
|
|
int num_regulators;
|
|
const struct regulator_desc *reg_desc;
|
|
|
|
/* custom attributes */
|
|
const struct attribute_group **groups;
|
|
};
|
|
|
|
/* Regulator ops */
|
|
|
|
extern const struct regulator_ops pmbus_regulator_ops;
|
|
|
|
/* Macro for filling in array of struct regulator_desc */
|
|
#define PMBUS_REGULATOR(_name, _id) \
|
|
[_id] = { \
|
|
.name = (_name # _id), \
|
|
.id = (_id), \
|
|
.of_match = of_match_ptr(_name # _id), \
|
|
.regulators_node = of_match_ptr("regulators"), \
|
|
.ops = &pmbus_regulator_ops, \
|
|
.type = REGULATOR_VOLTAGE, \
|
|
.owner = THIS_MODULE, \
|
|
}
|
|
|
|
/* Function declarations */
|
|
|
|
void pmbus_clear_cache(struct i2c_client *client);
|
|
void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
|
|
int pmbus_set_page(struct i2c_client *client, int page, int phase);
|
|
int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
|
|
u8 reg);
|
|
int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
|
|
u16 word);
|
|
int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
|
|
int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
|
|
int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
|
|
u8 value);
|
|
int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
|
|
u8 mask, u8 value);
|
|
void pmbus_clear_faults(struct i2c_client *client);
|
|
bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
|
|
bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
|
|
int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
|
|
const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
|
|
*client);
|
|
int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
|
|
enum pmbus_fan_mode mode);
|
|
int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
|
|
enum pmbus_fan_mode mode);
|
|
int pmbus_update_fan(struct i2c_client *client, int page, int id,
|
|
u8 config, u8 mask, u16 command);
|
|
struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
|
|
|
|
#endif /* PMBUS_H */
|