65 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Copyright (C) 2023, Intel Corporation
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|  * stmmac EST(802.3 Qbv) handling
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|  */
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| 
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| #define EST_GMAC4_OFFSET		0x00000c50
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| #define EST_XGMAC_OFFSET		0x00001050
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| 
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| #define EST_CONTROL			0x00000000
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| #define EST_GMAC5_PTOV			GENMASK(31, 24)
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| #define EST_GMAC5_PTOV_SHIFT		24
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| #define EST_GMAC5_PTOV_MUL		6
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| #define EST_XGMAC_PTOV			GENMASK(31, 23)
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| #define EST_XGMAC_PTOV_SHIFT		23
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| #define EST_XGMAC_PTOV_MUL		9
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| #define EST_SSWL			BIT(1)
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| #define EST_EEST			BIT(0)
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| 
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| #define EST_STATUS			0x00000008
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| #define EST_GMAC5_BTRL			GENMASK(11, 8)
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| #define EST_XGMAC_BTRL			GENMASK(15, 8)
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| #define EST_SWOL			BIT(7)
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| #define EST_SWOL_SHIFT			7
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| #define EST_CGCE			BIT(4)
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| #define EST_HLBS			BIT(3)
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| #define EST_HLBF			BIT(2)
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| #define EST_BTRE			BIT(1)
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| #define EST_SWLC			BIT(0)
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| 
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| #define EST_SCH_ERR			0x00000010
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| 
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| #define EST_FRM_SZ_ERR			0x00000014
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| 
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| #define EST_FRM_SZ_CAP			0x00000018
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| #define EST_SZ_CAP_HBFS_MASK		GENMASK(14, 0)
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| #define EST_SZ_CAP_HBFQ_SHIFT		16
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| #define EST_SZ_CAP_HBFQ_MASK(val)		\
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| 	({					\
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| 		typeof(val) _val = (val);	\
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| 		(_val > 4 ? GENMASK(18, 16) :	\
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| 		 _val > 2 ? GENMASK(17, 16) :	\
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| 		 BIT(16));			\
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| 	})
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| 
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| #define EST_INT_EN			0x00000020
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| #define EST_IECGCE			EST_CGCE
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| #define EST_IEHS			EST_HLBS
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| #define EST_IEHF			EST_HLBF
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| #define EST_IEBE			EST_BTRE
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| #define EST_IECC			EST_SWLC
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| 
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| #define EST_GCL_CONTROL			0x00000030
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| #define EST_BTR_LOW			0x0
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| #define EST_BTR_HIGH			0x1
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| #define EST_CTR_LOW			0x2
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| #define EST_CTR_HIGH			0x3
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| #define EST_TER				0x4
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| #define EST_LLR				0x5
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| #define EST_ADDR_SHIFT			8
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| #define EST_GCRR			BIT(2)
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| #define EST_SRWO			BIT(0)
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| 
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| #define EST_GCL_DATA			0x00000034
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