59 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			59 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  *  PS3 Game Console device tree.
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|  *
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|  *  Copyright (C) 2007 Sony Computer Entertainment Inc.
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|  *  Copyright 2007 Sony Corp.
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|  */
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| 
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| /dts-v1/;
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| 
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| / {
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| 	model = "SonyPS3";
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| 	compatible = "sony,ps3";
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| 	#size-cells = <2>;
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| 	#address-cells = <2>;
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| 
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| 	chosen {
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| 	};
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| 
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| 	/*
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| 	 * We'll get the size of the bootmem block from lv1 after startup,
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| 	 * so we'll put a null entry here.
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| 	 */
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| 
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| 	memory {
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| 		device_type = "memory";
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| 		reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
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| 	};
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| 
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| 	/*
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| 	 * The boot cpu is always zero for PS3.
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| 	 *
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| 	 * dtc expects a clock-frequency and timebase-frequency entries, so
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| 	 * we'll put a null entries here.  These will be initialized after
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| 	 * startup with data from lv1.
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| 	 *
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| 	 * Seems the only way currently to indicate a processor has multiple
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| 	 * threads is with an ibm,ppc-interrupt-server#s entry.  We'll put one
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| 	 * here so we can bring up both of ours.  See smp_setup_cpu_maps().
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| 	 */
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| 
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| 	cpus {
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| 		#size-cells = <0>;
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| 		#address-cells = <1>;
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| 
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| 		cpu@0 {
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| 			device_type = "cpu";
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| 			reg = <0x00000000>;
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| 			ibm,ppc-interrupt-server#s = <0x0 0x1>;
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| 			clock-frequency = <0>;
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| 			timebase-frequency = <0>;
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| 			i-cache-size = <32768>;
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| 			d-cache-size = <32768>;
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| 			i-cache-line-size = <128>;
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| 			d-cache-line-size = <128>;
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| 		};
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| 	};
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| };
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