331 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			331 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| #include <errno.h>
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| #include <string.h>
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| #include <regex.h>
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| #include <linux/kernel.h>
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| #include <linux/zalloc.h>
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| 
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| #include "perf_regs.h"
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| #include "../../../perf-sys.h"
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| #include "../../../util/perf_regs.h"
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| #include "../../../util/debug.h"
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| #include "../../../util/event.h"
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| #include "../../../util/pmu.h"
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| #include "../../../util/pmus.h"
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| 
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| static const struct sample_reg sample_reg_masks[] = {
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| 	SMPL_REG(AX, PERF_REG_X86_AX),
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| 	SMPL_REG(BX, PERF_REG_X86_BX),
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| 	SMPL_REG(CX, PERF_REG_X86_CX),
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| 	SMPL_REG(DX, PERF_REG_X86_DX),
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| 	SMPL_REG(SI, PERF_REG_X86_SI),
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| 	SMPL_REG(DI, PERF_REG_X86_DI),
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| 	SMPL_REG(BP, PERF_REG_X86_BP),
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| 	SMPL_REG(SP, PERF_REG_X86_SP),
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| 	SMPL_REG(IP, PERF_REG_X86_IP),
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| 	SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
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| 	SMPL_REG(CS, PERF_REG_X86_CS),
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| 	SMPL_REG(SS, PERF_REG_X86_SS),
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| #ifdef HAVE_ARCH_X86_64_SUPPORT
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| 	SMPL_REG(R8, PERF_REG_X86_R8),
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| 	SMPL_REG(R9, PERF_REG_X86_R9),
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| 	SMPL_REG(R10, PERF_REG_X86_R10),
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| 	SMPL_REG(R11, PERF_REG_X86_R11),
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| 	SMPL_REG(R12, PERF_REG_X86_R12),
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| 	SMPL_REG(R13, PERF_REG_X86_R13),
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| 	SMPL_REG(R14, PERF_REG_X86_R14),
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| 	SMPL_REG(R15, PERF_REG_X86_R15),
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| #endif
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| 	SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
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| 	SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
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| 	SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
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| 	SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
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| 	SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
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| 	SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
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| 	SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
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| 	SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
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| 	SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
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| 	SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
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| 	SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
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| 	SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
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| 	SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
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| 	SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
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| 	SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
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| 	SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
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| 	SMPL_REG_END
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| };
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| 
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| struct sdt_name_reg {
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| 	const char *sdt_name;
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| 	const char *uprobe_name;
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| };
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| #define SDT_NAME_REG(n, m) {.sdt_name = "%" #n, .uprobe_name = "%" #m}
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| #define SDT_NAME_REG_END {.sdt_name = NULL, .uprobe_name = NULL}
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| 
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| static const struct sdt_name_reg sdt_reg_tbl[] = {
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| 	SDT_NAME_REG(eax, ax),
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| 	SDT_NAME_REG(rax, ax),
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| 	SDT_NAME_REG(al,  ax),
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| 	SDT_NAME_REG(ah,  ax),
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| 	SDT_NAME_REG(ebx, bx),
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| 	SDT_NAME_REG(rbx, bx),
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| 	SDT_NAME_REG(bl,  bx),
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| 	SDT_NAME_REG(bh,  bx),
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| 	SDT_NAME_REG(ecx, cx),
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| 	SDT_NAME_REG(rcx, cx),
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| 	SDT_NAME_REG(cl,  cx),
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| 	SDT_NAME_REG(ch,  cx),
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| 	SDT_NAME_REG(edx, dx),
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| 	SDT_NAME_REG(rdx, dx),
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| 	SDT_NAME_REG(dl,  dx),
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| 	SDT_NAME_REG(dh,  dx),
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| 	SDT_NAME_REG(esi, si),
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| 	SDT_NAME_REG(rsi, si),
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| 	SDT_NAME_REG(sil, si),
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| 	SDT_NAME_REG(edi, di),
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| 	SDT_NAME_REG(rdi, di),
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| 	SDT_NAME_REG(dil, di),
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| 	SDT_NAME_REG(ebp, bp),
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| 	SDT_NAME_REG(rbp, bp),
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| 	SDT_NAME_REG(bpl, bp),
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| 	SDT_NAME_REG(rsp, sp),
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| 	SDT_NAME_REG(esp, sp),
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| 	SDT_NAME_REG(spl, sp),
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| 
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| 	/* rNN registers */
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| 	SDT_NAME_REG(r8b,  r8),
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| 	SDT_NAME_REG(r8w,  r8),
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| 	SDT_NAME_REG(r8d,  r8),
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| 	SDT_NAME_REG(r9b,  r9),
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| 	SDT_NAME_REG(r9w,  r9),
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| 	SDT_NAME_REG(r9d,  r9),
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| 	SDT_NAME_REG(r10b, r10),
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| 	SDT_NAME_REG(r10w, r10),
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| 	SDT_NAME_REG(r10d, r10),
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| 	SDT_NAME_REG(r11b, r11),
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| 	SDT_NAME_REG(r11w, r11),
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| 	SDT_NAME_REG(r11d, r11),
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| 	SDT_NAME_REG(r12b, r12),
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| 	SDT_NAME_REG(r12w, r12),
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| 	SDT_NAME_REG(r12d, r12),
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| 	SDT_NAME_REG(r13b, r13),
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| 	SDT_NAME_REG(r13w, r13),
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| 	SDT_NAME_REG(r13d, r13),
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| 	SDT_NAME_REG(r14b, r14),
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| 	SDT_NAME_REG(r14w, r14),
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| 	SDT_NAME_REG(r14d, r14),
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| 	SDT_NAME_REG(r15b, r15),
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| 	SDT_NAME_REG(r15w, r15),
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| 	SDT_NAME_REG(r15d, r15),
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| 	SDT_NAME_REG_END,
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| };
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| 
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| /*
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|  * Perf only supports OP which is in  +/-NUM(REG)  form.
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|  * Here plus-minus sign, NUM and parenthesis are optional,
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|  * only REG is mandatory.
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|  *
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|  * SDT events also supports indirect addressing mode with a
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|  * symbol as offset, scaled mode and constants in OP. But
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|  * perf does not support them yet. Below are few examples.
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|  *
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|  * OP with scaled mode:
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|  *     (%rax,%rsi,8)
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|  *     10(%ras,%rsi,8)
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|  *
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|  * OP with indirect addressing mode:
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|  *     check_action(%rip)
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|  *     mp_+52(%rip)
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|  *     44+mp_(%rip)
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|  *
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|  * OP with constant values:
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|  *     $0
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|  *     $123
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|  *     $-1
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|  */
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| #define SDT_OP_REGEX  "^([+\\-]?)([0-9]*)(\\(?)(%[a-z][a-z0-9]+)(\\)?)$"
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| 
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| static regex_t sdt_op_regex;
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| 
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| static int sdt_init_op_regex(void)
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| {
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| 	static int initialized;
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| 	int ret = 0;
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| 
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| 	if (initialized)
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| 		return 0;
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| 
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| 	ret = regcomp(&sdt_op_regex, SDT_OP_REGEX, REG_EXTENDED);
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| 	if (ret < 0) {
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| 		pr_debug4("Regex compilation error.\n");
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| 		return ret;
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| 	}
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| 
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| 	initialized = 1;
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| 	return 0;
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| }
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| 
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| /*
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|  * Max x86 register name length is 5(ex: %r15d). So, 6th char
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|  * should always contain NULL. This helps to find register name
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|  * length using strlen, instead of maintaining one more variable.
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|  */
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| #define SDT_REG_NAME_SIZE  6
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| 
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| /*
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|  * The uprobe parser does not support all gas register names;
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|  * so, we have to replace them (ex. for x86_64: %rax -> %ax).
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|  * Note: If register does not require renaming, just copy
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|  * paste as it is, but don't leave it empty.
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|  */
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| static void sdt_rename_register(char *sdt_reg, int sdt_len, char *uprobe_reg)
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| {
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| 	int i = 0;
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| 
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| 	for (i = 0; sdt_reg_tbl[i].sdt_name != NULL; i++) {
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| 		if (!strncmp(sdt_reg_tbl[i].sdt_name, sdt_reg, sdt_len)) {
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| 			strcpy(uprobe_reg, sdt_reg_tbl[i].uprobe_name);
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| 			return;
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| 		}
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| 	}
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| 
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| 	strncpy(uprobe_reg, sdt_reg, sdt_len);
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| }
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| 
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| int arch_sdt_arg_parse_op(char *old_op, char **new_op)
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| {
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| 	char new_reg[SDT_REG_NAME_SIZE] = {0};
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| 	int new_len = 0, ret;
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| 	/*
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| 	 * rm[0]:  +/-NUM(REG)
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| 	 * rm[1]:  +/-
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| 	 * rm[2]:  NUM
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| 	 * rm[3]:  (
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| 	 * rm[4]:  REG
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| 	 * rm[5]:  )
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| 	 */
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| 	regmatch_t rm[6];
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| 	/*
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| 	 * Max prefix length is 2 as it may contains sign(+/-)
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| 	 * and displacement 0 (Both sign and displacement 0 are
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| 	 * optional so it may be empty). Use one more character
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| 	 * to hold last NULL so that strlen can be used to find
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| 	 * prefix length, instead of maintaining one more variable.
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| 	 */
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| 	char prefix[3] = {0};
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| 
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| 	ret = sdt_init_op_regex();
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| 	if (ret < 0)
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| 		return ret;
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| 
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| 	/*
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| 	 * If unsupported OR does not match with regex OR
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| 	 * register name too long, skip it.
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| 	 */
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| 	if (strchr(old_op, ',') || strchr(old_op, '$') ||
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| 	    regexec(&sdt_op_regex, old_op, 6, rm, 0)   ||
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| 	    rm[4].rm_eo - rm[4].rm_so > SDT_REG_NAME_SIZE) {
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| 		pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
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| 		return SDT_ARG_SKIP;
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| 	}
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| 
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| 	/*
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| 	 * Prepare prefix.
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| 	 * If SDT OP has parenthesis but does not provide
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| 	 * displacement, add 0 for displacement.
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| 	 *     SDT         Uprobe     Prefix
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| 	 *     -----------------------------
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| 	 *     +24(%rdi)   +24(%di)   +
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| 	 *     24(%rdi)    +24(%di)   +
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| 	 *     %rdi        %di
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| 	 *     (%rdi)      +0(%di)    +0
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| 	 *     -80(%rbx)   -80(%bx)   -
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| 	 */
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| 	if (rm[3].rm_so != rm[3].rm_eo) {
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| 		if (rm[1].rm_so != rm[1].rm_eo)
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| 			prefix[0] = *(old_op + rm[1].rm_so);
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| 		else if (rm[2].rm_so != rm[2].rm_eo)
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| 			prefix[0] = '+';
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| 		else
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| 			scnprintf(prefix, sizeof(prefix), "+0");
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| 	}
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| 
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| 	/* Rename register */
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| 	sdt_rename_register(old_op + rm[4].rm_so, rm[4].rm_eo - rm[4].rm_so,
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| 			    new_reg);
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| 
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| 	/* Prepare final OP which should be valid for uprobe_events */
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| 	new_len = strlen(prefix)              +
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| 		  (rm[2].rm_eo - rm[2].rm_so) +
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| 		  (rm[3].rm_eo - rm[3].rm_so) +
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| 		  strlen(new_reg)             +
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| 		  (rm[5].rm_eo - rm[5].rm_so) +
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| 		  1;					/* NULL */
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| 
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| 	*new_op = zalloc(new_len);
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| 	if (!*new_op)
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| 		return -ENOMEM;
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| 
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| 	scnprintf(*new_op, new_len, "%.*s%.*s%.*s%.*s%.*s",
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| 		  strlen(prefix), prefix,
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| 		  (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
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| 		  (int)(rm[3].rm_eo - rm[3].rm_so), old_op + rm[3].rm_so,
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| 		  strlen(new_reg), new_reg,
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| 		  (int)(rm[5].rm_eo - rm[5].rm_so), old_op + rm[5].rm_so);
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| 
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| 	return SDT_ARG_VALID;
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| }
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| 
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| const struct sample_reg *arch__sample_reg_masks(void)
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| {
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| 	return sample_reg_masks;
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| }
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| 
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| uint64_t arch__intr_reg_mask(void)
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| {
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| 	struct perf_event_attr attr = {
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| 		.type			= PERF_TYPE_HARDWARE,
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| 		.config			= PERF_COUNT_HW_CPU_CYCLES,
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| 		.sample_type		= PERF_SAMPLE_REGS_INTR,
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| 		.sample_regs_intr	= PERF_REG_EXTENDED_MASK,
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| 		.precise_ip		= 1,
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| 		.disabled 		= 1,
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| 		.exclude_kernel		= 1,
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| 	};
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| 	int fd;
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| 	/*
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| 	 * In an unnamed union, init it here to build on older gcc versions
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| 	 */
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| 	attr.sample_period = 1;
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| 
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| 	if (perf_pmus__num_core_pmus() > 1) {
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| 		struct perf_pmu *pmu = NULL;
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| 		__u64 type = PERF_TYPE_RAW;
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| 
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| 		/*
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| 		 * The same register set is supported among different hybrid PMUs.
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| 		 * Only check the first available one.
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| 		 */
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| 		while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {
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| 			type = pmu->type;
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| 			break;
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| 		}
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| 		attr.config |= type << PERF_PMU_TYPE_SHIFT;
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| 	}
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| 
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| 	event_attr_init(&attr);
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| 
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| 	fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
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| 	if (fd != -1) {
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| 		close(fd);
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| 		return (PERF_REG_EXTENDED_MASK | PERF_REGS_MASK);
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| 	}
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| 
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| 	return PERF_REGS_MASK;
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| }
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| 
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| uint64_t arch__user_reg_mask(void)
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| {
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| 	return PERF_REGS_MASK;
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| }
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