139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mm/copypage-v6.c
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*
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* Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
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*/
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/highmem.h>
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#include <linux/pagemap.h>
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#include <asm/shmparam.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include "mm.h"
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#if SHMLBA > 16384
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#error FIX ME
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#endif
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static DEFINE_RAW_SPINLOCK(v6_lock);
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/*
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* Copy the user page. No aliasing to deal with so we can just
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* attack the kernel's existing mapping of these pages.
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*/
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static void v6_copy_user_highpage_nonaliasing(struct page *to,
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struct page *from, unsigned long vaddr, struct vm_area_struct *vma)
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{
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void *kto, *kfrom;
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kfrom = kmap_atomic(from);
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kto = kmap_atomic(to);
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copy_page(kto, kfrom);
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kunmap_atomic(kto);
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kunmap_atomic(kfrom);
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}
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/*
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* Clear the user page. No aliasing to deal with so we can just
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* attack the kernel's existing mapping of this page.
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*/
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static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr)
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{
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void *kaddr = kmap_atomic(page);
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clear_page(kaddr);
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kunmap_atomic(kaddr);
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}
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/*
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* Discard data in the kernel mapping for the new page.
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* FIXME: needs this MCRR to be supported.
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*/
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static void discard_old_kernel_data(void *kto)
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{
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__asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
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:
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: "r" (kto),
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"r" ((unsigned long)kto + PAGE_SIZE - 1)
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: "cc");
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}
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/*
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* Copy the page, taking account of the cache colour.
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*/
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static void v6_copy_user_highpage_aliasing(struct page *to,
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struct page *from, unsigned long vaddr, struct vm_area_struct *vma)
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{
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struct folio *src = page_folio(from);
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unsigned int offset = CACHE_COLOUR(vaddr);
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unsigned long kfrom, kto;
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if (!test_and_set_bit(PG_dcache_clean, &src->flags))
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__flush_dcache_folio(folio_flush_mapping(src), src);
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/* FIXME: not highmem safe */
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discard_old_kernel_data(page_address(to));
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/*
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* Now copy the page using the same cache colour as the
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* pages ultimate destination.
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*/
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raw_spin_lock(&v6_lock);
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kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT);
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kto = COPYPAGE_V6_TO + (offset << PAGE_SHIFT);
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set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL));
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set_top_pte(kto, mk_pte(to, PAGE_KERNEL));
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copy_page((void *)kto, (void *)kfrom);
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raw_spin_unlock(&v6_lock);
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}
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/*
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* Clear the user page. We need to deal with the aliasing issues,
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* so remap the kernel page into the same cache colour as the user
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* page.
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*/
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static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
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{
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unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
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/* FIXME: not highmem safe */
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discard_old_kernel_data(page_address(page));
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/*
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* Now clear the page using the same cache colour as
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* the pages ultimate destination.
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*/
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raw_spin_lock(&v6_lock);
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set_top_pte(to, mk_pte(page, PAGE_KERNEL));
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clear_page((void *)to);
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raw_spin_unlock(&v6_lock);
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}
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struct cpu_user_fns v6_user_fns __initdata = {
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.cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing,
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.cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
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};
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static int __init v6_userpage_init(void)
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{
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if (cache_is_vipt_aliasing()) {
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cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing;
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cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
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}
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return 0;
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}
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core_initcall(v6_userpage_init);
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