281 lines
7.5 KiB
C
281 lines
7.5 KiB
C
/*
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* Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2006 Michael Buesch <m@bues.ch>
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* Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
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* Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "bcm47xx_private.h"
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#include <linux/bcm47xx_sprom.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include <linux/ssb/ssb.h>
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#include <linux/ssb/ssb_embedded.h>
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#include <linux/bcma/bcma_soc.h>
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#include <asm/bootinfo.h>
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#include <asm/idle.h>
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#include <asm/prom.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <bcm47xx.h>
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#include <bcm47xx_board.h>
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union bcm47xx_bus bcm47xx_bus;
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EXPORT_SYMBOL(bcm47xx_bus);
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enum bcm47xx_bus_type bcm47xx_bus_type;
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EXPORT_SYMBOL(bcm47xx_bus_type);
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static void bcm47xx_machine_restart(char *command)
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{
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pr_alert("Please stand by while rebooting the system...\n");
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local_irq_disable();
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/* Set the watchdog timer to reset immediately */
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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if (bcm47xx_bus.ssb.chip_id == 0x4785)
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write_c0_diag4(1 << 22);
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ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
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if (bcm47xx_bus.ssb.chip_id == 0x4785) {
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__asm__ __volatile__(
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".set\tmips3\n\t"
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"sync\n\t"
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"wait\n\t"
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".set\tmips0");
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}
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
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break;
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#endif
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}
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while (1)
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cpu_relax();
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}
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static void bcm47xx_machine_halt(void)
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{
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/* Disable interrupts and watchdog and spin forever */
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local_irq_disable();
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
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break;
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#endif
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}
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while (1)
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cpu_relax();
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}
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#ifdef CONFIG_BCM47XX_SSB
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static void __init bcm47xx_register_ssb(void)
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{
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int err;
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char buf[100];
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struct ssb_mipscore *mcore;
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err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE);
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if (err)
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panic("Failed to initialize SSB bus (err %d)", err);
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mcore = &bcm47xx_bus.ssb.mipscore;
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if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
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if (strstr(buf, "console=ttyS1")) {
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struct ssb_serial_port port;
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pr_debug("Swapping serial ports!\n");
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/* swap serial ports */
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memcpy(&port, &mcore->serial_ports[0], sizeof(port));
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memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
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sizeof(port));
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memcpy(&mcore->serial_ports[1], &port, sizeof(port));
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}
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}
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}
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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static void __init bcm47xx_register_bcma(void)
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{
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int err;
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err = bcma_host_soc_register(&bcm47xx_bus.bcma);
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if (err)
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panic("Failed to register BCMA bus (err %d)", err);
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}
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#endif
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/*
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* Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed
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* to detect memory and record it with memblock_add.
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* Any extra initializaion performed here must not use kmalloc or bootmem.
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*/
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void __init plat_mem_setup(void)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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if (c->cputype == CPU_74K) {
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pr_info("Using bcma bus\n");
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#ifdef CONFIG_BCM47XX_BCMA
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bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
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bcm47xx_register_bcma();
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bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
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#ifdef CONFIG_HIGHMEM
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bcm47xx_prom_highmem_init();
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#endif
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#endif
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} else {
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pr_info("Using ssb bus\n");
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#ifdef CONFIG_BCM47XX_SSB
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bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
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bcm47xx_sprom_register_fallbacks();
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bcm47xx_register_ssb();
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bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id);
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#endif
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}
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_machine_restart = bcm47xx_machine_restart;
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_machine_halt = bcm47xx_machine_halt;
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pm_power_off = bcm47xx_machine_halt;
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}
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#ifdef CONFIG_BCM47XX_BCMA
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static struct device * __init bcm47xx_setup_device(void)
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{
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struct device *dev;
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int err;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return NULL;
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err = dev_set_name(dev, "bcm47xx_soc");
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if (err) {
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pr_err("Failed to set SoC device name: %d\n", err);
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kfree(dev);
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return NULL;
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}
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err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (err)
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pr_err("Failed to set SoC DMA mask: %d\n", err);
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return dev;
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}
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#endif
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/*
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* This finishes bus initialization doing things that were not possible without
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* kmalloc. Make sure to call it late enough (after mm_init).
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*/
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void __init bcm47xx_bus_setup(void)
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{
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#ifdef CONFIG_BCM47XX_BCMA
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if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
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int err;
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bcm47xx_bus.bcma.dev = bcm47xx_setup_device();
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if (!bcm47xx_bus.bcma.dev)
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panic("Failed to setup SoC device\n");
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err = bcma_host_soc_init(&bcm47xx_bus.bcma);
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if (err)
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panic("Failed to initialize BCMA bus (err %d)", err);
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}
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#endif
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/* With bus initialized we can access NVRAM and detect the board */
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bcm47xx_board_detect();
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mips_set_machine_name(bcm47xx_board_get_name());
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}
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static int __init bcm47xx_cpu_fixes(void)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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/* Nothing to do */
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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/* The BCM4706 has a problem with the CPU wait instruction.
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* When r4k_wait or r4k_wait_irqoff is used will just hang and
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* not return from a msleep(). Removing the cpu_wait
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* functionality is a workaround for this problem. The BCM4716
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* does not have this problem.
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*/
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if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
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cpu_wait = NULL;
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break;
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#endif
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}
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return 0;
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}
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arch_initcall(bcm47xx_cpu_fixes);
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static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {
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.link = 1,
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.speed = SPEED_100,
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.duplex = DUPLEX_FULL,
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};
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static int __init bcm47xx_register_bus_complete(void)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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/* Nothing to do */
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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if (device_register(bcm47xx_bus.bcma.dev))
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pr_err("Failed to register SoC device\n");
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bcma_bus_register(&bcm47xx_bus.bcma.bus);
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break;
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#endif
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}
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bcm47xx_buttons_register();
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bcm47xx_leds_register();
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bcm47xx_workarounds();
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fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
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return 0;
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}
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device_initcall(bcm47xx_register_bus_complete);
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