186 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			186 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: GPIO controller for Davinci and keystone devices
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| 
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| maintainers:
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|   - Keerthy <j-keerthy@ti.com>
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| 
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| properties:
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|   compatible:
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|     oneOf:
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|       - items:
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|           - enum:
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|               - ti,k2g-gpio
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|               - ti,am654-gpio
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|               - ti,j721e-gpio
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|               - ti,am64-gpio
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|           - const: ti,keystone-gpio
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| 
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|       - items:
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|           - enum:
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|               - ti,dm6441-gpio
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|               - ti,keystone-gpio
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| 
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|   reg:
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|     maxItems: 1
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| 
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|   gpio-controller: true
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| 
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|   gpio-ranges: true
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| 
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|   gpio-line-names:
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|     description: strings describing the names of each gpio line.
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|     minItems: 1
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|     maxItems: 100
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| 
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|   "#gpio-cells":
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|     const: 2
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|     description:
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|       first cell is the pin number and second cell is used to specify optional parameters (unused).
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| 
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|   interrupts:
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|     description:
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|       The interrupts are specified as per the interrupt parent. Only banked
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|       or unbanked IRQs are supported at a time. If the interrupts are
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|       banked then provide list of interrupts corresponding to each bank, else
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|       provide the list of interrupts for each gpio.
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|     minItems: 1
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|     maxItems: 100
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| 
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|   ti,ngpio:
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|     $ref: /schemas/types.yaml#/definitions/uint32
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|     description: The number of GPIO pins supported consecutively.
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|     minimum: 1
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| 
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|   ti,davinci-gpio-unbanked:
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|     $ref: /schemas/types.yaml#/definitions/uint32
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|     description: The number of GPIOs that have an individual interrupt line to processor.
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|     minimum: 0
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| 
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|   clocks:
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|     maxItems: 1
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| 
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|   clock-names:
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|     const: gpio
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| 
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|   interrupt-controller: true
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| 
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|   power-domains:
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|     maxItems: 1
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| 
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|   "#interrupt-cells":
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|     const: 2
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| 
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| patternProperties:
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|   "^(.+-hog(-[0-9]+)?)$":
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|     type: object
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| 
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|     required:
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|       - gpio-hog
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| 
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| required:
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|   - compatible
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|   - reg
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|   - gpio-controller
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|   - "#gpio-cells"
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|   - interrupts
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|   - ti,ngpio
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|   - ti,davinci-gpio-unbanked
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|   - clocks
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|   - clock-names
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     #include<dt-bindings/interrupt-controller/arm-gic.h>
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| 
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|     gpio0: gpio@2603000 {
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|       compatible = "ti,k2g-gpio", "ti,keystone-gpio";
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|       reg = <0x02603000 0x100>;
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|       gpio-controller;
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|       #gpio-cells = <2>;
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|       interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
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|       interrupt-controller;
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|       #interrupt-cells = <2>;
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|       ti,ngpio = <144>;
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|       ti,davinci-gpio-unbanked = <0>;
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|       clocks = <&k2g_clks 0x001b 0x0>;
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|       clock-names = "gpio";
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|     };    
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| 
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|   - |
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|     #include<dt-bindings/interrupt-controller/arm-gic.h>
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| 
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|     gpio1: gpio@260bf00 {
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|       compatible = "ti,keystone-gpio";
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|       reg = <0x0260bf00 0x100>;
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|       gpio-controller;
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|       #gpio-cells = <2>;
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|       /* HW Interrupts mapped to GPIO pins */
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|       interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
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|                    <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
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|       clocks = <&clkgpio>;
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|       clock-names = "gpio";
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|       ti,ngpio = <32>;
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|       ti,davinci-gpio-unbanked = <32>;
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|     };    
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| 
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|   - |
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|     wkup_gpio0: gpio0@42110000 {
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|       compatible = "ti,am654-gpio", "ti,keystone-gpio";
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|       reg = <0x42110000 0x100>;
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|       gpio-controller;
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|       #gpio-cells = <2>;
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|       interrupt-parent = <&intr_wkup_gpio>;
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|       interrupts = <60>, <61>, <62>, <63>;
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|       interrupt-controller;
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|       #interrupt-cells = <2>;
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|       ti,ngpio = <56>;
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|       ti,davinci-gpio-unbanked = <0>;
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|       clocks = <&k3_clks 59 0>;
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|       clock-names = "gpio";
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|     };    
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