468 lines
12 KiB
C
468 lines
12 KiB
C
/*
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* Cryptographic API.
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*
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* Glue code for the SHA256 Secure Hash Algorithm assembler implementations
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* using SSSE3, AVX, AVX2, and SHA-NI instructions.
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*
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* This file is based on sha256_generic.c
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*
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* Copyright (C) 2013 Intel Corporation.
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*
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* Author:
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* Tim Chen <tim.c.chen@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <crypto/internal/hash.h>
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#include <crypto/internal/simd.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/types.h>
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#include <crypto/sha2.h>
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#include <crypto/sha256_base.h>
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#include <linux/string.h>
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#include <asm/cpu_device_id.h>
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#include <asm/simd.h>
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asmlinkage void sha256_transform_ssse3(struct sha256_state *state,
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const u8 *data, int blocks);
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static const struct x86_cpu_id module_cpu_ids[] = {
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#ifdef CONFIG_AS_SHA256_NI
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X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),
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#endif
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X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
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X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
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X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
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static int _sha256_update(struct shash_desc *desc, const u8 *data,
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unsigned int len, sha256_block_fn *sha256_xform)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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if (!crypto_simd_usable() ||
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(sctx->count % SHA256_BLOCK_SIZE) + len < SHA256_BLOCK_SIZE)
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return crypto_sha256_update(desc, data, len);
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/*
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* Make sure struct sha256_state begins directly with the SHA256
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* 256-bit internal state, as this is what the asm functions expect.
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*/
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BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);
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kernel_fpu_begin();
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sha256_base_do_update(desc, data, len, sha256_xform);
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kernel_fpu_end();
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return 0;
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}
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static int sha256_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out, sha256_block_fn *sha256_xform)
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{
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if (!crypto_simd_usable())
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return crypto_sha256_finup(desc, data, len, out);
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kernel_fpu_begin();
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if (len)
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sha256_base_do_update(desc, data, len, sha256_xform);
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sha256_base_do_finalize(desc, sha256_xform);
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kernel_fpu_end();
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return sha256_base_finish(desc, out);
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}
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static int sha256_ssse3_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return _sha256_update(desc, data, len, sha256_transform_ssse3);
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}
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static int sha256_ssse3_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_finup(desc, data, len, out, sha256_transform_ssse3);
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}
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/* Add padding and return the message digest. */
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static int sha256_ssse3_final(struct shash_desc *desc, u8 *out)
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{
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return sha256_ssse3_finup(desc, NULL, 0, out);
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}
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static int sha256_ssse3_digest(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_base_init(desc) ?:
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sha256_ssse3_finup(desc, data, len, out);
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}
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static struct shash_alg sha256_ssse3_algs[] = { {
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.digestsize = SHA256_DIGEST_SIZE,
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.init = sha256_base_init,
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.update = sha256_ssse3_update,
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.final = sha256_ssse3_final,
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.finup = sha256_ssse3_finup,
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.digest = sha256_ssse3_digest,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-ssse3",
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.cra_priority = 150,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA224_DIGEST_SIZE,
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.init = sha224_base_init,
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.update = sha256_ssse3_update,
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.final = sha256_ssse3_final,
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.finup = sha256_ssse3_finup,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha224",
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.cra_driver_name = "sha224-ssse3",
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.cra_priority = 150,
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.cra_blocksize = SHA224_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static int register_sha256_ssse3(void)
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{
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if (boot_cpu_has(X86_FEATURE_SSSE3))
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return crypto_register_shashes(sha256_ssse3_algs,
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ARRAY_SIZE(sha256_ssse3_algs));
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return 0;
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}
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static void unregister_sha256_ssse3(void)
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{
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if (boot_cpu_has(X86_FEATURE_SSSE3))
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crypto_unregister_shashes(sha256_ssse3_algs,
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ARRAY_SIZE(sha256_ssse3_algs));
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}
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asmlinkage void sha256_transform_avx(struct sha256_state *state,
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const u8 *data, int blocks);
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static int sha256_avx_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return _sha256_update(desc, data, len, sha256_transform_avx);
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}
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static int sha256_avx_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_finup(desc, data, len, out, sha256_transform_avx);
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}
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static int sha256_avx_final(struct shash_desc *desc, u8 *out)
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{
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return sha256_avx_finup(desc, NULL, 0, out);
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}
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static int sha256_avx_digest(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_base_init(desc) ?:
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sha256_avx_finup(desc, data, len, out);
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}
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static struct shash_alg sha256_avx_algs[] = { {
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.digestsize = SHA256_DIGEST_SIZE,
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.init = sha256_base_init,
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.update = sha256_avx_update,
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.final = sha256_avx_final,
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.finup = sha256_avx_finup,
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.digest = sha256_avx_digest,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-avx",
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.cra_priority = 160,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA224_DIGEST_SIZE,
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.init = sha224_base_init,
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.update = sha256_avx_update,
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.final = sha256_avx_final,
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.finup = sha256_avx_finup,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha224",
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.cra_driver_name = "sha224-avx",
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.cra_priority = 160,
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.cra_blocksize = SHA224_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static bool avx_usable(void)
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{
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if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
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if (boot_cpu_has(X86_FEATURE_AVX))
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pr_info("AVX detected but unusable.\n");
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return false;
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}
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return true;
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}
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static int register_sha256_avx(void)
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{
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if (avx_usable())
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return crypto_register_shashes(sha256_avx_algs,
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ARRAY_SIZE(sha256_avx_algs));
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return 0;
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}
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static void unregister_sha256_avx(void)
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{
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if (avx_usable())
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crypto_unregister_shashes(sha256_avx_algs,
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ARRAY_SIZE(sha256_avx_algs));
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}
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asmlinkage void sha256_transform_rorx(struct sha256_state *state,
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const u8 *data, int blocks);
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static int sha256_avx2_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return _sha256_update(desc, data, len, sha256_transform_rorx);
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}
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static int sha256_avx2_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_finup(desc, data, len, out, sha256_transform_rorx);
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}
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static int sha256_avx2_final(struct shash_desc *desc, u8 *out)
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{
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return sha256_avx2_finup(desc, NULL, 0, out);
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}
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static int sha256_avx2_digest(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_base_init(desc) ?:
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sha256_avx2_finup(desc, data, len, out);
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}
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static struct shash_alg sha256_avx2_algs[] = { {
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.digestsize = SHA256_DIGEST_SIZE,
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.init = sha256_base_init,
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.update = sha256_avx2_update,
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.final = sha256_avx2_final,
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.finup = sha256_avx2_finup,
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.digest = sha256_avx2_digest,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-avx2",
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.cra_priority = 170,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA224_DIGEST_SIZE,
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.init = sha224_base_init,
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.update = sha256_avx2_update,
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.final = sha256_avx2_final,
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.finup = sha256_avx2_finup,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha224",
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.cra_driver_name = "sha224-avx2",
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.cra_priority = 170,
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.cra_blocksize = SHA224_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static bool avx2_usable(void)
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{
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if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_BMI2))
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return true;
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return false;
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}
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static int register_sha256_avx2(void)
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{
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if (avx2_usable())
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return crypto_register_shashes(sha256_avx2_algs,
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ARRAY_SIZE(sha256_avx2_algs));
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return 0;
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}
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static void unregister_sha256_avx2(void)
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{
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if (avx2_usable())
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crypto_unregister_shashes(sha256_avx2_algs,
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ARRAY_SIZE(sha256_avx2_algs));
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}
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#ifdef CONFIG_AS_SHA256_NI
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asmlinkage void sha256_ni_transform(struct sha256_state *digest,
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const u8 *data, int rounds);
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static int sha256_ni_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return _sha256_update(desc, data, len, sha256_ni_transform);
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}
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static int sha256_ni_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_finup(desc, data, len, out, sha256_ni_transform);
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}
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static int sha256_ni_final(struct shash_desc *desc, u8 *out)
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{
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return sha256_ni_finup(desc, NULL, 0, out);
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}
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static int sha256_ni_digest(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return sha256_base_init(desc) ?:
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sha256_ni_finup(desc, data, len, out);
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}
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static struct shash_alg sha256_ni_algs[] = { {
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.digestsize = SHA256_DIGEST_SIZE,
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.init = sha256_base_init,
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.update = sha256_ni_update,
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.final = sha256_ni_final,
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.finup = sha256_ni_finup,
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.digest = sha256_ni_digest,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-ni",
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.cra_priority = 250,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA224_DIGEST_SIZE,
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.init = sha224_base_init,
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.update = sha256_ni_update,
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.final = sha256_ni_final,
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.finup = sha256_ni_finup,
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.descsize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha224",
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.cra_driver_name = "sha224-ni",
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.cra_priority = 250,
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.cra_blocksize = SHA224_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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static int register_sha256_ni(void)
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{
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if (boot_cpu_has(X86_FEATURE_SHA_NI))
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return crypto_register_shashes(sha256_ni_algs,
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ARRAY_SIZE(sha256_ni_algs));
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return 0;
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}
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static void unregister_sha256_ni(void)
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{
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if (boot_cpu_has(X86_FEATURE_SHA_NI))
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crypto_unregister_shashes(sha256_ni_algs,
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ARRAY_SIZE(sha256_ni_algs));
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}
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#else
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static inline int register_sha256_ni(void) { return 0; }
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static inline void unregister_sha256_ni(void) { }
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#endif
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static int __init sha256_ssse3_mod_init(void)
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{
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if (!x86_match_cpu(module_cpu_ids))
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return -ENODEV;
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if (register_sha256_ssse3())
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goto fail;
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if (register_sha256_avx()) {
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unregister_sha256_ssse3();
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goto fail;
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}
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if (register_sha256_avx2()) {
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unregister_sha256_avx();
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unregister_sha256_ssse3();
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goto fail;
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}
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if (register_sha256_ni()) {
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unregister_sha256_avx2();
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unregister_sha256_avx();
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unregister_sha256_ssse3();
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goto fail;
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}
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return 0;
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fail:
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return -ENODEV;
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}
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static void __exit sha256_ssse3_mod_fini(void)
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{
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unregister_sha256_ni();
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unregister_sha256_avx2();
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unregister_sha256_avx();
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unregister_sha256_ssse3();
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}
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module_init(sha256_ssse3_mod_init);
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module_exit(sha256_ssse3_mod_fini);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated");
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MODULE_ALIAS_CRYPTO("sha256");
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MODULE_ALIAS_CRYPTO("sha256-ssse3");
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MODULE_ALIAS_CRYPTO("sha256-avx");
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MODULE_ALIAS_CRYPTO("sha256-avx2");
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MODULE_ALIAS_CRYPTO("sha224");
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MODULE_ALIAS_CRYPTO("sha224-ssse3");
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MODULE_ALIAS_CRYPTO("sha224-avx");
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MODULE_ALIAS_CRYPTO("sha224-avx2");
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#ifdef CONFIG_AS_SHA256_NI
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MODULE_ALIAS_CRYPTO("sha256-ni");
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MODULE_ALIAS_CRYPTO("sha224-ni");
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#endif
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