36 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			36 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| DesignWare I2S controller
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| 
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| Required properties:
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|  - compatible : Must be "snps,designware-i2s"
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|  - reg : Must contain the I2S core's registers location and length
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|  - clocks : Pairs of phandle and specifier referencing the controller's
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|    clocks. The controller expects one clock: the clock used as the sampling
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|    rate reference clock sample.
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|  - clock-names : "i2sclk" for the sample rate reference clock.
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|  - dmas: Pairs of phandle and specifier for the DMA channels that are used by
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|    the core. The core expects one or two dma channels: one for transmit and
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|    one for receive.
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|  - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
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| 
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| Optional properties:
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|  - interrupts: The interrupt line number for the I2S controller. Add this
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|    parameter if the I2S controller that you are using does not support DMA.
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| 
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| For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
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| properties please check:
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| 	* resource-names.txt
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| 	* clock/clock-bindings.txt
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| 	* dma/dma.txt
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| 
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| Example:
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| 
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| 	soc_i2s: i2s@7ff90000 {
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| 		compatible = "snps,designware-i2s";
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| 		reg = <0x0 0x7ff90000 0x0 0x1000>;
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| 		clocks = <&scpi_i2sclk 0>;
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| 		clock-names = "i2sclk";
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| 		#sound-dai-cells = <0>;
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| 		dmas = <&dma0 5>;
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| 		dma-names = "tx";
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| 	};
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