106 lines
4.2 KiB
ReStructuredText
106 lines
4.2 KiB
ReStructuredText
=============================================================
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Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
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=============================================================
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The Yitian 710, custom-built by Alibaba Group's chip development business,
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T-Head, implements uncore PMU for performance and functional debugging to
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facilitate system maintenance.
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DDR Sub-System Driveway (DRW) PMU Driver
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=========================================
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Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel
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is independent of others to service system memory requests. And one DDR5
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channel is split into two independent sub-channels. The DDR Sub-System Driveway
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implements separate PMUs for each sub-channel to monitor various performance
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metrics.
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The Driveway PMU devices are named as ali_drw_<sys_base_addr> with perf.
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For example, ali_drw_21000 and ali_drw_21080 are two PMU devices for two
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sub-channels of the same channel in die 0. And the PMU device of die 1 is
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prefixed with ali_drw_400XXXXX, e.g. ali_drw_40021000.
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Each sub-channel has 36 PMU counters in total, which is classified into
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four groups:
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- Group 0: PMU Cycle Counter. This group has one pair of counters
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pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count
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based on DDRC core clock.
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- Group 1: PMU Bandwidth Counters. This group has 8 counters that are used
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to count the total access number of either the eight bank groups in a
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selected rank, or four ranks separately in the first 4 counters. The base
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transfer unit is 64B.
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- Group 2: PMU Retry Counters. This group has 10 counters, that intend to
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count the total retry number of each type of uncorrectable error.
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- Group 3: PMU Common Counters. This group has 16 counters, that are used
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to count the common events.
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For now, the Driveway PMU driver only uses counters in group 0 and group 3.
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The DDR Controller (DDRCTL) and DDR PHY combine to create a complete solution
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for connecting an SoC application bus to DDR memory devices. The DDRCTL
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receives transactions Host Interface (HIF) which is custom-defined by Synopsys.
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These transactions are queued internally and scheduled for access while
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satisfying the SDRAM protocol timing requirements, transaction priorities, and
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dependencies between the transactions. The DDRCTL in turn issues commands on
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the DDR PHY Interface (DFI) to the PHY module, which launches and captures data
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to and from the SDRAM. The driveway PMUs have hardware logic to gather
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statistics and performance logging signals on HIF, DFI, etc.
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By counting the READ, WRITE and RMW commands sent to the DDRC through the HIF
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interface, we could calculate the bandwidth. Example usage of counting memory
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data bandwidth::
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perf stat \
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-e ali_drw_21000/hif_wr/ \
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-e ali_drw_21000/hif_rd/ \
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-e ali_drw_21000/hif_rmw/ \
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-e ali_drw_21000/cycle/ \
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-e ali_drw_21080/hif_wr/ \
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-e ali_drw_21080/hif_rd/ \
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-e ali_drw_21080/hif_rmw/ \
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-e ali_drw_21080/cycle/ \
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-e ali_drw_23000/hif_wr/ \
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-e ali_drw_23000/hif_rd/ \
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-e ali_drw_23000/hif_rmw/ \
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-e ali_drw_23000/cycle/ \
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-e ali_drw_23080/hif_wr/ \
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-e ali_drw_23080/hif_rd/ \
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-e ali_drw_23080/hif_rmw/ \
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-e ali_drw_23080/cycle/ \
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-e ali_drw_25000/hif_wr/ \
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-e ali_drw_25000/hif_rd/ \
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-e ali_drw_25000/hif_rmw/ \
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-e ali_drw_25000/cycle/ \
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-e ali_drw_25080/hif_wr/ \
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-e ali_drw_25080/hif_rd/ \
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-e ali_drw_25080/hif_rmw/ \
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-e ali_drw_25080/cycle/ \
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-e ali_drw_27000/hif_wr/ \
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-e ali_drw_27000/hif_rd/ \
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-e ali_drw_27000/hif_rmw/ \
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-e ali_drw_27000/cycle/ \
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-e ali_drw_27080/hif_wr/ \
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-e ali_drw_27080/hif_rd/ \
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-e ali_drw_27080/hif_rmw/ \
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-e ali_drw_27080/cycle/ -- sleep 10
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Example usage of counting all memory read/write bandwidth by metric::
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perf stat -M ddr_read_bandwidth.all -- sleep 10
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perf stat -M ddr_write_bandwidth.all -- sleep 10
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The average DRAM bandwidth can be calculated as follows:
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- Read Bandwidth = perf_hif_rd * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle
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- Write Bandwidth = (perf_hif_wr + perf_hif_rmw) * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle
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Here, DDRC_WIDTH = 64 bytes.
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The current driver does not support sampling. So "perf record" is
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unsupported. Also attach to a task is unsupported as the events are all
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uncore.
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