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			14 KiB
		
	
	
	
		
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			597 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /*
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|  * Copyright 2017
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|  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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|  *
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|  * This file is dual-licensed: you can use it either under the terms
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|  * of the GPL or the X11 license, at your option. Note that this dual
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|  * licensing only applies to this file, and not this project as a
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|  * whole.
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|  *
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|  *  a) This file is licensed under the terms of the GNU General Public
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|  *     License version 2.  This program is licensed "as is" without
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|  *     any warranty of any kind, whether express or implied.
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|  *
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|  * Or, alternatively,
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|  *
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|  *  b) Permission is hereby granted, free of charge, to any person
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|  *     obtaining a copy of this software and associated documentation
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|  *     files (the "Software"), to deal in the Software without
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|  *     restriction, including without limitation the rights to use,
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|  *     copy, modify, merge, publish, distribute, sublicense, and/or
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|  *     sell copies of the Software, and to permit persons to whom the
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|  *     Software is furnished to do so, subject to the following
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|  *     conditions:
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|  *
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|  *     The above copyright notice and this permission notice shall be
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|  *     included in all copies or substantial portions of the Software.
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|  *
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|  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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|  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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|  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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|  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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|  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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|  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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|  *     OTHER DEALINGS IN THE SOFTWARE.
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|  */
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| 
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| /dts-v1/;
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| 
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| #include "imx6q.dtsi"
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| 
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| #include <dt-bindings/gpio/gpio.h>
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| #include <dt-bindings/pwm/pwm.h>
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| #include <dt-bindings/sound/fsl-imx-audmux.h>
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| 
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| / {
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| 	model = "Liebherr (LWN) display5 i.MX6 Quad Board";
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| 	compatible = "lwn,display5", "fsl,imx6q";
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| 
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| 	memory@10000000 {
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| 		reg = <0x10000000 0x40000000>;
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| 	};
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| 
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| 	backlight_lvds: backlight {
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| 		compatible = "pwm-backlight";
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&pinctrl_backlight>;
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| 		pwms = <&pwm2 0 5000000 0>;
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| 		brightness-levels = <  0   1   2   3   4   5   6   7   8   9
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| 				      10  11  12  13  14  15  16  17  18  19
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| 				      20  21  22  23  24  25  26  27  28  29
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| 				      30  31  32  33  34  35  36  37  38  39
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| 				      40  41  42  43  44  45  46  47  48  49
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| 				      50  51  52  53  54  55  56  57  58  59
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| 				      60  61  62  63  64  65  66  67  68  69
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| 				      70  71  72  73  74  75  76  77  78  79
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| 				      80  81  82  83  84  85  86  87  88  89
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| 				      90  91  92  93  94  95  96  97  98  99
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| 				     100 101 102 103 104 105 106 107 108 109
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| 				     110 111 112 113 114 115 116 117 118 119
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| 				     120 121 122 123 124 125 126 127 128 129
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| 				     130 131 132 133 134 135 136 137 138 139
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| 				     140 141 142 143 144 145 146 147 148 149
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| 				     150 151 152 153 154 155 156 157 158 159
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| 				     160 161 162 163 164 165 166 167 168 169
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| 				     170 171 172 173 174 175 176 177 178 179
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| 				     180 181 182 183 184 185 186 187 188 189
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| 				     190 191 192 193 194 195 196 197 198 199
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| 				     200 201 202 203 204 205 206 207 208 209
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| 				     210 211 212 213 214 215 216 217 218 219
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| 				     220 221 222 223 224 225 226 227 228 229
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| 				     230 231 232 233 234 235 236 237 238 239
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| 				     240 241 242 243 244 245 246 247 248 249
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| 				     250 251 252 253 254 255>;
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| 		default-brightness-level = <250>;
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| 		enable-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>;
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| 	};
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| 
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| 	reg_lvds: regulator-lvds {
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| 		compatible = "regulator-fixed";
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| 		regulator-name = "lvds_ppen";
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| 		regulator-min-microvolt = <3300000>;
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| 		regulator-max-microvolt = <3300000>;
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| 		regulator-boot-on;
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| 		regulator-always-on;
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&pinctrl_reg_lvds>;
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| 		gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
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| 		enable-active-high;
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| 	};
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| 
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| 	reg_usbh1_vbus: usb-h1-vbus {
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| 		compatible = "regulator-fixed";
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| 		gpio = <&gpio3 31 GPIO_ACTIVE_LOW>;
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&pinctrl_usbh1_vbus>;
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| 		regulator-name = "usb_h1_vbus";
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| 		regulator-min-microvolt = <5000000>;
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| 		regulator-max-microvolt = <5000000>;
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| 		regulator-enable-ramp-delay = <300000>;
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| 	};
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| 
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| 	sound {
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| 		compatible = "simple-audio-card";
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| 		label = "tfa9879-mono";
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| 
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| 		simple-audio-card,dai-link {
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| 			/* DAC */
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| 			format = "i2s";
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| 			bitclock-master = <&dailink_master>;
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| 			frame-master = <&dailink_master>;
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| 
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| 			dailink_master: cpu {
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| 			    sound-dai = <&ssi2>;
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| 			};
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| 			codec {
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| 			    sound-dai = <&codec>;
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| 			};
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| 		};
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| 	};
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| 
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| 	panel: panel-lvds0 {
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| 		backlight = <&backlight_lvds>;
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| 		power-supply = <®_lvds>;
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| 
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| 		port {
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| 			panel_in_lvds0: endpoint {
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| 				remote-endpoint = <&lvds0_out>;
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &audmux {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_audmux>;
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| 	status = "okay";
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| 
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| 	ssi2 {
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| 		fsl,audmux-port = <1>;
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| 		fsl,port-config = <
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| 			(IMX_AUDMUX_V2_PTCR_SYN |
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| 			 IMX_AUDMUX_V2_PTCR_TFSEL(5) |
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| 			 IMX_AUDMUX_V2_PTCR_TCSEL(5) |
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| 			 IMX_AUDMUX_V2_PTCR_TFSDIR |
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| 			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
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| 			IMX_AUDMUX_V2_PDCR_RXDSEL(5)
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| 		>;
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| 	};
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| 
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| 	aud6 {
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| 		fsl,audmux-port = <5>;
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| 		fsl,port-config = <
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| 			(IMX_AUDMUX_V2_PTCR_RFSEL(8) |
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| 			 IMX_AUDMUX_V2_PTCR_RCSEL(8) |
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| 			 IMX_AUDMUX_V2_PTCR_TFSEL(1) |
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| 			 IMX_AUDMUX_V2_PTCR_TCSEL(1) |
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| 			 IMX_AUDMUX_V2_PTCR_RFSDIR |
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| 			 IMX_AUDMUX_V2_PTCR_RCLKDIR |
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| 			 IMX_AUDMUX_V2_PTCR_TFSDIR |
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| 			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
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| 			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
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| 		>;
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| 	};
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| };
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| 
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| &ecspi2 {
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| 	cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs &pinctrl_ecspi2_flwp>;
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| 	status = "okay";
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| 
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| 	s25fl256s: flash@0 {
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		compatible = "jedec,spi-nor";
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| 		spi-max-frequency = <40000000>;
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| 		reg = <0>;
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| 
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| 		partition@0 {
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| 			label = "SPL (spi)";
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| 			reg = <0x0 0x20000>;
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| 			read-only;
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| 		};
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| 		partition@1 {
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| 			label = "u-boot (spi)";
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| 			reg = <0x20000 0x100000>;
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| 			read-only;
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| 		};
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| 		partition@2 {
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| 			label = "uboot-env (spi)";
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| 			reg = <0x120000 0x10000>;
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| 		};
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| 		partition@3 {
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| 			label = "uboot-envr (spi)";
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| 			reg = <0x130000 0x10000>;
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| 		};
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| 		partition@4 {
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| 			label = "linux-recovery (spi)";
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| 			reg = <0x140000 0x800000>;
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| 		};
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| 		partition@5 {
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| 			label = "swupdate-fitImg (spi)";
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| 			reg = <0x940000 0x400000>;
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| 		};
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| 		partition@6 {
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| 			label = "swupdate-initramfs (spi)";
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| 			reg = <0xD40000 0x800000>;
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| 		};
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| 	};
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| };
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| 
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| &ecspi3 {
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| 	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
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| 	status = "okay";
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| };
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| 
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| &fec {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_enet>;
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| 	phy-handle = <ðernet_phy0>;
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| 	phy-mode = "rgmii-id";
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| 	status = "okay";
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| 
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| 	mdio {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		ethernet_phy0: ethernet-phy@0 {
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| 			compatible = "marvell,88E1510";
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| 			device_type = "ethernet-phy";
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| 			/* Set LED0 control: */
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| 			/* On - Link, Blink - Activity, Off - No Link */
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| 			marvell,reg-init = <3 0x10 0 0x1011>;
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| 			max-speed = <100>;
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| 			reg = <0>;
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| 		};
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| 	};
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| };
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| 
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| &i2c1 {
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| 	clock-frequency = <400000>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_i2c1>;
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| 	status = "okay";
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| 
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| 	codec: tfa9879@6c {
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| 		#sound-dai-cells = <0>;
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| 		compatible = "nxp,tfa9879";
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| 		reg = <0x6C>;
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| 	};
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| };
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| 
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| &i2c2 {
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| 	clock-frequency = <400000>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_i2c2>;
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| 	status = "okay";
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| };
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| 
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| &i2c3 {
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| 	clock-frequency = <400000>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_i2c3>;
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| 	status = "okay";
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| 
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| 	at24@50 {
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| 		compatible = "atmel,24c256";
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| 		pagesize = <64>;
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| 		reg = <0x50>;
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| 	};
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| 
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| 	pfuze100: pmic@8 {
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| 		compatible = "fsl,pfuze100";
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| 		reg = <0x08>;
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| 
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| 		regulators {
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| 			sw1a_reg: sw1ab {
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| 				regulator-min-microvolt = <300000>;
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| 				regulator-max-microvolt = <1875000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 				regulator-ramp-delay = <6250>;
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| 			};
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| 
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| 			sw1c_reg: sw1c {
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| 				regulator-min-microvolt = <300000>;
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| 				regulator-max-microvolt = <1875000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 				regulator-ramp-delay = <6250>;
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| 			};
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| 
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| 			sw2_reg: sw2 {
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| 				regulator-min-microvolt = <800000>;
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| 				regulator-max-microvolt = <3950000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 			};
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| 
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| 			sw3a_reg: sw3a {
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| 				regulator-min-microvolt = <400000>;
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| 				regulator-max-microvolt = <1975000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 			};
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| 
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| 			sw3b_reg: sw3b {
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| 				regulator-min-microvolt = <400000>;
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| 				regulator-max-microvolt = <1975000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 			};
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| 
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| 			sw4_reg: sw4 {
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| 				regulator-min-microvolt = <800000>;
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| 				regulator-max-microvolt = <3300000>;
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| 			};
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| 
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| 			swbst_reg: swbst {
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| 				regulator-min-microvolt = <5000000>;
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| 				regulator-max-microvolt = <5150000>;
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| 			};
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| 
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| 			snvs_reg: vsnvs {
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| 				regulator-min-microvolt = <1000000>;
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| 				regulator-max-microvolt = <3000000>;
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 			};
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| 
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| 			vref_reg: vrefddr {
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| 				regulator-boot-on;
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| 				regulator-always-on;
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| 			};
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| 
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| 			vgen1_reg: vgen1 {
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| 				regulator-min-microvolt = <800000>;
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| 				regulator-max-microvolt = <1550000>;
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| 			};
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| 
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| 			vgen2_reg: vgen2 {
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| 				regulator-min-microvolt = <800000>;
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| 				regulator-max-microvolt = <1550000>;
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| 			};
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| 
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| 			vgen3_reg: vgen3 {
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| 				regulator-min-microvolt = <1800000>;
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| 				regulator-max-microvolt = <3300000>;
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| 			};
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| 
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| 			vgen4_reg: vgen4 {
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| 				regulator-min-microvolt = <1800000>;
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| 				regulator-max-microvolt = <3300000>;
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| 				regulator-always-on;
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| 			};
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| 
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| 			vgen5_reg: vgen5 {
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| 				regulator-min-microvolt = <1800000>;
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| 				regulator-max-microvolt = <3300000>;
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| 				regulator-always-on;
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| 			};
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| 
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| 			vgen6_reg: vgen6 {
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| 				regulator-min-microvolt = <1800000>;
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| 				regulator-max-microvolt = <3300000>;
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| 				regulator-always-on;
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &ldb {
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| 	status = "okay";
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| 
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| 	lvds0: lvds-channel@0 {
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| 		status = "okay";
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| 
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| 		port@4 {
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| 			reg = <4>;
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| 
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| 			lvds0_out: endpoint {
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| 				remote-endpoint = <&panel_in_lvds0>;
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &pwm2 {
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| 	#pwm-cells = <3>;
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_pwm2>;
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| 	status = "okay";
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| };
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| 
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| &ssi2 {
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| 	status = "okay";
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| };
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| 
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| &uart4 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_uart4>;
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| 	uart-has-rtscts;
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| 	status = "okay";
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| };
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| 
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| &uart5 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_uart5>;
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| 	status = "okay";
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| };
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| 
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| &usbh1 {
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| 	vbus-supply = <®_usbh1_vbus>;
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| 	pinctrl-0 = <&pinctrl_usbh1>;
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| 	status = "okay";
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| };
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| 
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| &usdhc4 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&pinctrl_usdhc4>;
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| 	bus-width = <8>;
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| 	non-removable;
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| 	status = "okay";
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| };
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| 
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| &iomuxc {
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| 	pinctrl_audmux: audmuxgrp {
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| 		fsl,pins = <
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| 			/* I2S OUTPUT AUD6*/
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| 			MX6QDL_PAD_DI0_PIN4__AUD6_RXD  0x130b0
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| 			MX6QDL_PAD_DI0_PIN2__AUD6_TXD  0x130b0
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| 			MX6QDL_PAD_DI0_PIN3__AUD6_TXFS  0x130b0
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| 			MX6QDL_PAD_DI0_PIN15__AUD6_TXC  0x130b0
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| 		>;
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| 	};
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| 
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| 	pinctrl_backlight: dispgrp {
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| 		fsl,pins = <
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| 			/* BLEN_OUT */
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| 			MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07    0x1b0b0
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| 		>;
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| 	};
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| 
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| 	pinctrl_ecspi2: ecspi2grp {
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| 		fsl,pins = <
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| 			MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO	0x100b1
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| 			MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI	0x100b1
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| 			MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK	0x100b1
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| 		>;
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| 	};
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| 
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| 	pinctrl_ecspi2_cs: ecspi2csgrp {
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| 		fsl,pins = <
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| 			MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1
 | |
| 		>;
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| 	};
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| 
 | |
| 	pinctrl_ecspi2_flwp: ecspi2flwpgrp {
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| 		fsl,pins = <
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| 			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_ecspi3: ecspi3grp {
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| 		fsl,pins = <
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| 			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
 | |
| 			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
 | |
| 			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_ecspi3_cs: ecspi3csgrp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_ecspi3_flwp: ecspi3flwpgrp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_enet: enetgrp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
 | |
| 			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
 | |
| 			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
 | |
| 			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
 | |
| 			MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
 | |
| 			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
 | |
| 			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_i2c1: i2c1grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
 | |
| 			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_i2c2: i2c2grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1
 | |
| 			MX6QDL_PAD_EIM_D16__I2C2_SDA	0x4001b8b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_i2c3: i2c3grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_EIM_D17__I2C3_SCL	0x4001b8b1
 | |
| 			MX6QDL_PAD_EIM_D18__I2C3_SDA	0x4001b8b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_pwm2: pwm2grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_DISP0_DAT9__PWM2_OUT	0x1b0b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_reg_lvds: reqlvdsgrp {
 | |
| 		fsl,pins = <
 | |
| 			/* LVDS_PPEN_OUT */
 | |
| 			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_uart4: uart4grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	0x1b0b1
 | |
| 			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	0x1b0b1
 | |
| 			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B	0x1b0b1
 | |
| 			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B	0x1b0b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_uart5: uart5grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA	0x1b0b1
 | |
| 			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_usbh1: usbh1grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_EIM_D30__USB_H1_OC  0x030b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_usbh1_vbus: usbh1_vbus_grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
 | |
| 		>;
 | |
| 	};
 | |
| 
 | |
| 	pinctrl_usdhc4: usdhc4grp {
 | |
| 		fsl,pins = <
 | |
| 			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
 | |
| 			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
 | |
| 			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
 | |
| 			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 | |
| 			MX6QDL_PAD_NANDF_ALE__SD4_RESET	0x17059
 | |
| 		>;
 | |
| 	};
 | |
| };
 |