396 lines
14 KiB
C
396 lines
14 KiB
C
/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "smu11_driver_if.h"
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#include "vega20_processpptables.h"
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#include "ppatomfwctrl.h"
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#include "atomfirmware.h"
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#include "pp_debug.h"
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#include "cgs_common.h"
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#include "vega20_pptable.h"
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#define VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE 105
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static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
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enum phm_platform_caps cap)
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{
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if (enable)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap);
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else
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap);
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}
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static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
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{
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int index = GetIndexIntoMasterDataTable(powerplayinfo);
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u16 size;
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u8 frev, crev;
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const void *table_address = hwmgr->soft_pp_table;
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if (!table_address) {
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table_address = (ATOM_Vega20_POWERPLAYTABLE *)
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smu_atom_get_data_table(hwmgr->adev, index,
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&size, &frev, &crev);
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hwmgr->soft_pp_table = table_address;
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hwmgr->soft_pp_table_size = size;
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}
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return table_address;
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}
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static int check_powerplay_tables(
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struct pp_hwmgr *hwmgr,
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const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
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{
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PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
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ATOM_VEGA20_TABLE_REVISION_VEGA20),
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"Unsupported PPTable format!", return -1);
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PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
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"Invalid PowerPlay Table!", return -1);
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if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) {
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pr_info("Unmatch PPTable version: "
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"pptable from VBIOS is V%d while driver supported is V%d!",
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powerplay_table->smcPPTable.Version,
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PPTABLE_V20_SMU_VERSION);
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return -EINVAL;
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}
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return 0;
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}
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static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
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{
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set_hw_cap(
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hwmgr,
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0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY),
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PHM_PlatformCaps_PowerPlaySupport);
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set_hw_cap(
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hwmgr,
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0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE),
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PHM_PlatformCaps_BiosPowerSourceControl);
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set_hw_cap(
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hwmgr,
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0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BACO),
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PHM_PlatformCaps_BACO);
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set_hw_cap(
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hwmgr,
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0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO),
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PHM_PlatformCaps_BAMACO);
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return 0;
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}
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static int copy_overdrive_feature_capabilities_array(
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struct pp_hwmgr *hwmgr,
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uint8_t **pptable_info_array,
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const uint8_t *pptable_array,
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uint8_t od_feature_count)
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{
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uint32_t array_size, i;
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uint8_t *table;
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bool od_supported = false;
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array_size = sizeof(uint8_t) * od_feature_count;
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table = kzalloc(array_size, GFP_KERNEL);
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if (NULL == table)
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return -ENOMEM;
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for (i = 0; i < od_feature_count; i++) {
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table[i] = le32_to_cpu(pptable_array[i]);
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if (table[i])
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od_supported = true;
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}
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*pptable_info_array = table;
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if (od_supported)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_ACOverdriveSupport);
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return 0;
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}
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static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable)
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{
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struct atom_smc_dpm_info_v4_4 *smc_dpm_table;
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int index = GetIndexIntoMasterDataTable(smc_dpm_info);
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int i;
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PP_ASSERT_WITH_CODE(
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smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL),
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"[appendVbiosPPTable] Failed to retrieve Smc Dpm Table from VBIOS!",
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return -1);
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ppsmc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
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ppsmc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
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ppsmc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
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ppsmc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
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ppsmc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
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ppsmc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
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ppsmc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
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ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
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ppsmc_pptable->ExternalSensorPresent = smc_dpm_table->externalsensorpresent;
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ppsmc_pptable->GfxMaxCurrent = smc_dpm_table->gfxmaxcurrent;
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ppsmc_pptable->GfxOffset = smc_dpm_table->gfxoffset;
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ppsmc_pptable->Padding_TelemetryGfx = smc_dpm_table->padding_telemetrygfx;
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ppsmc_pptable->SocMaxCurrent = smc_dpm_table->socmaxcurrent;
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ppsmc_pptable->SocOffset = smc_dpm_table->socoffset;
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ppsmc_pptable->Padding_TelemetrySoc = smc_dpm_table->padding_telemetrysoc;
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ppsmc_pptable->Mem0MaxCurrent = smc_dpm_table->mem0maxcurrent;
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ppsmc_pptable->Mem0Offset = smc_dpm_table->mem0offset;
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ppsmc_pptable->Padding_TelemetryMem0 = smc_dpm_table->padding_telemetrymem0;
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ppsmc_pptable->Mem1MaxCurrent = smc_dpm_table->mem1maxcurrent;
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ppsmc_pptable->Mem1Offset = smc_dpm_table->mem1offset;
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ppsmc_pptable->Padding_TelemetryMem1 = smc_dpm_table->padding_telemetrymem1;
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ppsmc_pptable->AcDcGpio = smc_dpm_table->acdcgpio;
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ppsmc_pptable->AcDcPolarity = smc_dpm_table->acdcpolarity;
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ppsmc_pptable->VR0HotGpio = smc_dpm_table->vr0hotgpio;
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ppsmc_pptable->VR0HotPolarity = smc_dpm_table->vr0hotpolarity;
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ppsmc_pptable->VR1HotGpio = smc_dpm_table->vr1hotgpio;
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ppsmc_pptable->VR1HotPolarity = smc_dpm_table->vr1hotpolarity;
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ppsmc_pptable->Padding1 = smc_dpm_table->padding1;
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ppsmc_pptable->Padding2 = smc_dpm_table->padding2;
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ppsmc_pptable->LedPin0 = smc_dpm_table->ledpin0;
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ppsmc_pptable->LedPin1 = smc_dpm_table->ledpin1;
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ppsmc_pptable->LedPin2 = smc_dpm_table->ledpin2;
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ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->pllgfxclkspreadenabled;
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ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->pllgfxclkspreadpercent;
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ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->pllgfxclkspreadfreq;
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ppsmc_pptable->UclkSpreadEnabled = 0;
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ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
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ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
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ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
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ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
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ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
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ppsmc_pptable->FllGfxclkSpreadEnabled = smc_dpm_table->fllgfxclkspreadenabled;
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ppsmc_pptable->FllGfxclkSpreadPercent = smc_dpm_table->fllgfxclkspreadpercent;
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ppsmc_pptable->FllGfxclkSpreadFreq = smc_dpm_table->fllgfxclkspreadfreq;
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for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
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ppsmc_pptable->I2cControllers[i].Enabled =
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smc_dpm_table->i2ccontrollers[i].enabled;
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ppsmc_pptable->I2cControllers[i].SlaveAddress =
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smc_dpm_table->i2ccontrollers[i].slaveaddress;
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ppsmc_pptable->I2cControllers[i].ControllerPort =
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smc_dpm_table->i2ccontrollers[i].controllerport;
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ppsmc_pptable->I2cControllers[i].ThermalThrottler =
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smc_dpm_table->i2ccontrollers[i].thermalthrottler;
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ppsmc_pptable->I2cControllers[i].I2cProtocol =
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smc_dpm_table->i2ccontrollers[i].i2cprotocol;
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ppsmc_pptable->I2cControllers[i].I2cSpeed =
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smc_dpm_table->i2ccontrollers[i].i2cspeed;
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}
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return 0;
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}
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static int override_powerplay_table_fantargettemperature(struct pp_hwmgr *hwmgr)
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{
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struct phm_ppt_v3_information *pptable_information =
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(struct phm_ppt_v3_information *)hwmgr->pptable;
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PPTable_t *ppsmc_pptable = (PPTable_t *)(pptable_information->smc_pptable);
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ppsmc_pptable->FanTargetTemperature = VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE;
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return 0;
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}
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#define VEGA20_ENGINECLOCK_HARDMAX 198000
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static int init_powerplay_table_information(
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struct pp_hwmgr *hwmgr,
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const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
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{
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struct phm_ppt_v3_information *pptable_information =
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(struct phm_ppt_v3_information *)hwmgr->pptable;
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uint32_t disable_power_control = 0;
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uint32_t od_feature_count, od_setting_count, power_saving_clock_count;
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int result;
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hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
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pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
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hwmgr->thermal_controller.fanInfo.ulMinRPM = 0;
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hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm;
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set_hw_cap(hwmgr,
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ATOM_VEGA20_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
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PHM_PlatformCaps_ThermalController);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
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if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) {
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od_feature_count =
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(le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) >
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ATOM_VEGA20_ODFEATURE_COUNT) ?
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ATOM_VEGA20_ODFEATURE_COUNT :
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le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount);
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od_setting_count =
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(le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) >
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ATOM_VEGA20_ODSETTING_COUNT) ?
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ATOM_VEGA20_ODSETTING_COUNT :
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le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount);
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copy_overdrive_feature_capabilities_array(hwmgr,
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&pptable_information->od_feature_capabilities,
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powerplay_table->OverDrive8Table.ODFeatureCapabilities,
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od_feature_count);
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phm_copy_overdrive_settings_limits_array(hwmgr,
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&pptable_information->od_settings_max,
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powerplay_table->OverDrive8Table.ODSettingsMax,
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od_setting_count);
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phm_copy_overdrive_settings_limits_array(hwmgr,
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&pptable_information->od_settings_min,
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powerplay_table->OverDrive8Table.ODSettingsMin,
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od_setting_count);
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}
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pptable_information->us_small_power_limit1 = le16_to_cpu(powerplay_table->usSmallPowerLimit1);
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pptable_information->us_small_power_limit2 = le16_to_cpu(powerplay_table->usSmallPowerLimit2);
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pptable_information->us_boost_power_limit = le16_to_cpu(powerplay_table->usBoostPowerLimit);
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pptable_information->us_od_turbo_power_limit = le16_to_cpu(powerplay_table->usODTurboPowerLimit);
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pptable_information->us_od_powersave_power_limit = le16_to_cpu(powerplay_table->usODPowerSavePowerLimit);
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pptable_information->us_software_shutdown_temp = le16_to_cpu(powerplay_table->usSoftwareShutdownTemp);
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hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
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disable_power_control = 0;
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if (!disable_power_control && hwmgr->platform_descriptor.TDPODLimit)
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/* enable TDP overdrive (PowerControl) feature as well if supported */
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phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerControl);
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if (powerplay_table->PowerSavingClockTable.ucTableRevision == 1) {
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power_saving_clock_count =
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(le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount) >=
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ATOM_VEGA20_PPCLOCK_COUNT) ?
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ATOM_VEGA20_PPCLOCK_COUNT :
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le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount);
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phm_copy_clock_limits_array(hwmgr,
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&pptable_information->power_saving_clock_max,
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powerplay_table->PowerSavingClockTable.PowerSavingClockMax,
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power_saving_clock_count);
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phm_copy_clock_limits_array(hwmgr,
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&pptable_information->power_saving_clock_min,
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powerplay_table->PowerSavingClockTable.PowerSavingClockMin,
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power_saving_clock_count);
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}
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pptable_information->smc_pptable = kmemdup(&(powerplay_table->smcPPTable),
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sizeof(PPTable_t),
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GFP_KERNEL);
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if (pptable_information->smc_pptable == NULL)
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return -ENOMEM;
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result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable));
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if (result)
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return result;
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result = override_powerplay_table_fantargettemperature(hwmgr);
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return result;
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}
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static int vega20_pp_tables_initialize(struct pp_hwmgr *hwmgr)
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{
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int result = 0;
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const ATOM_Vega20_POWERPLAYTABLE *powerplay_table;
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hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL);
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PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL),
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"Failed to allocate hwmgr->pptable!", return -ENOMEM);
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powerplay_table = get_powerplay_table(hwmgr);
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PP_ASSERT_WITH_CODE((powerplay_table != NULL),
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"Missing PowerPlay Table!", return -1);
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result = check_powerplay_tables(hwmgr, powerplay_table);
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PP_ASSERT_WITH_CODE((result == 0),
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"check_powerplay_tables failed", return result);
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result = set_platform_caps(hwmgr,
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le32_to_cpu(powerplay_table->ulPlatformCaps));
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PP_ASSERT_WITH_CODE((result == 0),
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"set_platform_caps failed", return result);
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result = init_powerplay_table_information(hwmgr, powerplay_table);
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PP_ASSERT_WITH_CODE((result == 0),
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"init_powerplay_table_information failed", return result);
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return result;
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}
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static int vega20_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
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{
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struct phm_ppt_v3_information *pp_table_info =
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(struct phm_ppt_v3_information *)(hwmgr->pptable);
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kfree(pp_table_info->power_saving_clock_max);
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pp_table_info->power_saving_clock_max = NULL;
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kfree(pp_table_info->power_saving_clock_min);
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pp_table_info->power_saving_clock_min = NULL;
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kfree(pp_table_info->od_feature_capabilities);
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pp_table_info->od_feature_capabilities = NULL;
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kfree(pp_table_info->od_settings_max);
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pp_table_info->od_settings_max = NULL;
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kfree(pp_table_info->od_settings_min);
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pp_table_info->od_settings_min = NULL;
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kfree(pp_table_info->smc_pptable);
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pp_table_info->smc_pptable = NULL;
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kfree(hwmgr->pptable);
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hwmgr->pptable = NULL;
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return 0;
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}
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const struct pp_table_func vega20_pptable_funcs = {
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.pptable_init = vega20_pp_tables_initialize,
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.pptable_fini = vega20_pp_tables_uninitialize,
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};
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