111 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			111 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-or-later */
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| /*
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|  * Copyright 2015, Cyril Bur, IBM Corp.
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|  */
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| 
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| #include "basic_asm.h"
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| #include "gpr_asm.h"
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| #include "fpu_asm.h"
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| #include "vmx_asm.h"
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| #include "vsx_asm.h"
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| 
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| /*
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|  * Large caveat here being that the caller cannot expect the
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|  * signal to always be sent! The hardware can (AND WILL!) abort
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|  * the transaction between the tbegin and the tsuspend (however
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|  * unlikely it seems or infrequently it actually happens).
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|  * You have been warned.
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|  */
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| /* long tm_signal_self(pid_t pid, long *gprs, double *fps, vector *vms, vector *vss); */
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| FUNC_START(tm_signal_self_context_load)
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| 	PUSH_BASIC_STACK(512)
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| 	/*
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| 	 * Don't strictly need to save and restore as it depends on if
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| 	 * we're going to use them, however this reduces messy logic
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| 	 */
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| 	PUSH_VMX(STACK_FRAME_LOCAL(5,0),r8)
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| 	PUSH_FPU(512)
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| 	PUSH_NVREGS_BELOW_FPU(512)
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| 	std r3, STACK_FRAME_PARAM(0)(sp) /* pid */
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| 	std r4, STACK_FRAME_PARAM(1)(sp) /* gps */
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| 	std r5, STACK_FRAME_PARAM(2)(sp) /* fps */
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| 	std r6, STACK_FRAME_PARAM(3)(sp) /* vms */
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| 	std r7, STACK_FRAME_PARAM(4)(sp) /* vss */
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| 
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| 	ld r3, STACK_FRAME_PARAM(1)(sp)
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| 	cmpdi r3, 0
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| 	beq skip_gpr_lc
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| 	bl load_gpr
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| skip_gpr_lc:
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| 	ld r3, STACK_FRAME_PARAM(2)(sp)
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| 	cmpdi	r3, 0
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| 	beq	skip_fpu_lc
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| 	bl load_fpu
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| skip_fpu_lc:
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| 	ld r3, STACK_FRAME_PARAM(3)(sp)
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| 	cmpdi r3, 0
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| 	beq	skip_vmx_lc
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| 	bl load_vmx
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| skip_vmx_lc:
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| 	ld r3, STACK_FRAME_PARAM(4)(sp)
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| 	cmpdi	r3, 0
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| 	beq	skip_vsx_lc
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| 	bl load_vsx
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| skip_vsx_lc:
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| 	/*
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| 	 * Set r3 (return value) before tbegin. Use the pid as a known
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| 	 * 'all good' return value, zero is used to indicate a non-doomed
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| 	 * transaction.
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| 	 */
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| 	ld	r3, STACK_FRAME_PARAM(0)(sp)
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| 	tbegin.
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| 	beq	1f
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| 	tsuspend. /* Can't enter a syscall transactionally */
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| 	ld	r3, STACK_FRAME_PARAM(1)(sp)
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| 	cmpdi	r3, 0
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| 	beq skip_gpr_lt
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| 	/* Get the second half of the array */
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| 	addi	r3, r3, 8 * 18
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| 	bl load_gpr
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| skip_gpr_lt:
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| 	ld r3, STACK_FRAME_PARAM(2)(sp)
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| 	cmpdi	r3, 0
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| 	beq	skip_fpu_lt
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| 	/* Get the second half of the array */
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| 	addi	r3, r3, 8 * 18
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| 	bl load_fpu
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| skip_fpu_lt:
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| 	ld r3, STACK_FRAME_PARAM(3)(sp)
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| 	cmpdi r3, 0
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| 	beq	skip_vmx_lt
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| 	/* Get the second half of the array */
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| 	addi	r3, r3, 16 * 12
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| 	bl load_vmx
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| skip_vmx_lt:
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| 	ld r3, STACK_FRAME_PARAM(4)(sp)
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| 	cmpdi	r3, 0
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| 	beq	skip_vsx_lt
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| 	/* Get the second half of the array */
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| 	addi	r3, r3, 16 * 12
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| 	bl load_vsx
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| skip_vsx_lt:
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| 	li	r0, 37 /* sys_kill */
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| 	ld r3, STACK_FRAME_PARAM(0)(sp) /* pid */
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| 	li r4, 10 /* SIGUSR1 */
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| 	sc /* Taking the signal will doom the transaction */
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| 	tabort. 0
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| 	tresume. /* Be super sure we abort */
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| 	/*
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| 	 * This will cause us to resume doomed transaction and cause
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| 	 * hardware to cleanup, we'll end up at 1: anything between
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| 	 * tresume. and 1: shouldn't ever run.
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| 	 */
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| 	li r3, 0
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| 	1:
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| 	POP_VMX(STACK_FRAME_LOCAL(5,0),r4)
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| 	POP_FPU(512)
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| 	POP_NVREGS_BELOW_FPU(512)
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| 	POP_BASIC_STACK(512)
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| 	blr
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| FUNC_END(tm_signal_self_context_load)
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