504 lines
13 KiB
C
504 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/* Microchip Sparx5 Switch driver
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*
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* Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
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*/
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#include <net/switchdev.h>
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#include <linux/if_bridge.h>
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#include <linux/iopoll.h>
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#include "sparx5_main_regs.h"
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#include "sparx5_main.h"
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/* Commands for Mac Table Command register */
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#define MAC_CMD_LEARN 0 /* Insert (Learn) 1 entry */
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#define MAC_CMD_UNLEARN 1 /* Unlearn (Forget) 1 entry */
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#define MAC_CMD_LOOKUP 2 /* Look up 1 entry */
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#define MAC_CMD_READ 3 /* Read entry at Mac Table Index */
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#define MAC_CMD_WRITE 4 /* Write entry at Mac Table Index */
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#define MAC_CMD_SCAN 5 /* Scan (Age or find next) */
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#define MAC_CMD_FIND_SMALLEST 6 /* Get next entry */
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#define MAC_CMD_CLEAR_ALL 7 /* Delete all entries in table */
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/* Commands for MAC_ENTRY_ADDR_TYPE */
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#define MAC_ENTRY_ADDR_TYPE_UPSID_PN 0
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#define MAC_ENTRY_ADDR_TYPE_UPSID_CPU_OR_INT 1
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#define MAC_ENTRY_ADDR_TYPE_GLAG 2
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#define MAC_ENTRY_ADDR_TYPE_MC_IDX 3
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#define TABLE_UPDATE_SLEEP_US 10
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#define TABLE_UPDATE_TIMEOUT_US 100000
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struct sparx5_mact_entry {
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struct list_head list;
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unsigned char mac[ETH_ALEN];
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u32 flags;
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#define MAC_ENT_ALIVE BIT(0)
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#define MAC_ENT_MOVED BIT(1)
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#define MAC_ENT_LOCK BIT(2)
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u16 vid;
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u16 port;
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};
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static int sparx5_mact_get_status(struct sparx5 *sparx5)
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{
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return spx5_rd(sparx5, LRN_COMMON_ACCESS_CTRL);
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}
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static int sparx5_mact_wait_for_completion(struct sparx5 *sparx5)
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{
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u32 val;
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return readx_poll_timeout(sparx5_mact_get_status,
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sparx5, val,
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_GET(val) == 0,
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TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);
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}
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static void sparx5_mact_select(struct sparx5 *sparx5,
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const unsigned char mac[ETH_ALEN],
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u16 vid)
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{
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u32 macl = 0, mach = 0;
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/* Set the MAC address to handle and the vlan associated in a format
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* understood by the hardware.
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*/
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mach |= vid << 16;
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mach |= mac[0] << 8;
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mach |= mac[1] << 0;
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macl |= mac[2] << 24;
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macl |= mac[3] << 16;
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macl |= mac[4] << 8;
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macl |= mac[5] << 0;
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spx5_wr(mach, sparx5, LRN_MAC_ACCESS_CFG_0);
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spx5_wr(macl, sparx5, LRN_MAC_ACCESS_CFG_1);
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}
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int sparx5_mact_learn(struct sparx5 *sparx5, int pgid,
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const unsigned char mac[ETH_ALEN], u16 vid)
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{
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int addr, type, ret;
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if (pgid < SPX5_PORTS) {
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type = MAC_ENTRY_ADDR_TYPE_UPSID_PN;
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addr = pgid % 32;
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addr += (pgid / 32) << 5; /* Add upsid */
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} else {
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type = MAC_ENTRY_ADDR_TYPE_MC_IDX;
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addr = pgid - SPX5_PORTS;
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}
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mutex_lock(&sparx5->lock);
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sparx5_mact_select(sparx5, mac, vid);
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/* MAC entry properties */
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spx5_wr(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_SET(addr) |
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LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE_SET(type) |
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LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD_SET(1) |
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LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED_SET(1),
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sparx5, LRN_MAC_ACCESS_CFG_2);
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spx5_wr(0, sparx5, LRN_MAC_ACCESS_CFG_3);
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/* Insert/learn new entry */
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spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(MAC_CMD_LEARN) |
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
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sparx5, LRN_COMMON_ACCESS_CTRL);
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ret = sparx5_mact_wait_for_completion(sparx5);
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mutex_unlock(&sparx5->lock);
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return ret;
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}
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int sparx5_mc_unsync(struct net_device *dev, const unsigned char *addr)
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{
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struct sparx5_port *port = netdev_priv(dev);
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struct sparx5 *sparx5 = port->sparx5;
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return sparx5_mact_forget(sparx5, addr, port->pvid);
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}
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int sparx5_mc_sync(struct net_device *dev, const unsigned char *addr)
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{
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struct sparx5_port *port = netdev_priv(dev);
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struct sparx5 *sparx5 = port->sparx5;
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return sparx5_mact_learn(sparx5, PGID_CPU, addr, port->pvid);
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}
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static int sparx5_mact_get(struct sparx5 *sparx5,
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unsigned char mac[ETH_ALEN],
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u16 *vid, u32 *pcfg2)
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{
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u32 mach, macl, cfg2;
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int ret = -ENOENT;
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cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
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if (LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD_GET(cfg2)) {
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mach = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_0);
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macl = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_1);
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mac[0] = ((mach >> 8) & 0xff);
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mac[1] = ((mach >> 0) & 0xff);
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mac[2] = ((macl >> 24) & 0xff);
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mac[3] = ((macl >> 16) & 0xff);
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mac[4] = ((macl >> 8) & 0xff);
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mac[5] = ((macl >> 0) & 0xff);
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*vid = mach >> 16;
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*pcfg2 = cfg2;
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ret = 0;
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}
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return ret;
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}
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bool sparx5_mact_getnext(struct sparx5 *sparx5,
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unsigned char mac[ETH_ALEN], u16 *vid, u32 *pcfg2)
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{
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u32 cfg2;
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int ret;
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mutex_lock(&sparx5->lock);
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sparx5_mact_select(sparx5, mac, *vid);
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spx5_wr(LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA_SET(1) |
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LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA_SET(1),
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sparx5, LRN_SCAN_NEXT_CFG);
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spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET
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(MAC_CMD_FIND_SMALLEST) |
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
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sparx5, LRN_COMMON_ACCESS_CTRL);
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ret = sparx5_mact_wait_for_completion(sparx5);
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if (ret == 0) {
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ret = sparx5_mact_get(sparx5, mac, vid, &cfg2);
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if (ret == 0)
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*pcfg2 = cfg2;
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}
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mutex_unlock(&sparx5->lock);
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return ret == 0;
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}
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int sparx5_mact_find(struct sparx5 *sparx5,
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const unsigned char mac[ETH_ALEN], u16 vid, u32 *pcfg2)
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{
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int ret;
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u32 cfg2;
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mutex_lock(&sparx5->lock);
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sparx5_mact_select(sparx5, mac, vid);
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/* Issue a lookup command */
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spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(MAC_CMD_LOOKUP) |
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
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sparx5, LRN_COMMON_ACCESS_CTRL);
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ret = sparx5_mact_wait_for_completion(sparx5);
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if (ret == 0) {
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cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
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if (LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD_GET(cfg2))
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*pcfg2 = cfg2;
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else
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ret = -ENOENT;
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}
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mutex_unlock(&sparx5->lock);
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return ret;
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}
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int sparx5_mact_forget(struct sparx5 *sparx5,
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const unsigned char mac[ETH_ALEN], u16 vid)
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{
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int ret;
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mutex_lock(&sparx5->lock);
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sparx5_mact_select(sparx5, mac, vid);
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/* Issue an unlearn command */
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spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(MAC_CMD_UNLEARN) |
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
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sparx5, LRN_COMMON_ACCESS_CTRL);
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ret = sparx5_mact_wait_for_completion(sparx5);
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mutex_unlock(&sparx5->lock);
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return ret;
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}
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static struct sparx5_mact_entry *alloc_mact_entry(struct sparx5 *sparx5,
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const unsigned char *mac,
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u16 vid, u16 port_index)
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{
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struct sparx5_mact_entry *mact_entry;
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mact_entry = devm_kzalloc(sparx5->dev,
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sizeof(*mact_entry), GFP_ATOMIC);
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if (!mact_entry)
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return NULL;
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memcpy(mact_entry->mac, mac, ETH_ALEN);
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mact_entry->vid = vid;
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mact_entry->port = port_index;
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return mact_entry;
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}
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static struct sparx5_mact_entry *find_mact_entry(struct sparx5 *sparx5,
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const unsigned char *mac,
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u16 vid, u16 port_index)
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{
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struct sparx5_mact_entry *mact_entry;
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struct sparx5_mact_entry *res = NULL;
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mutex_lock(&sparx5->mact_lock);
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list_for_each_entry(mact_entry, &sparx5->mact_entries, list) {
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if (mact_entry->vid == vid &&
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ether_addr_equal(mac, mact_entry->mac) &&
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mact_entry->port == port_index) {
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res = mact_entry;
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break;
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}
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}
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mutex_unlock(&sparx5->mact_lock);
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return res;
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}
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static void sparx5_fdb_call_notifiers(enum switchdev_notifier_type type,
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const char *mac, u16 vid,
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struct net_device *dev, bool offloaded)
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{
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struct switchdev_notifier_fdb_info info = {};
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info.addr = mac;
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info.vid = vid;
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info.offloaded = offloaded;
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call_switchdev_notifiers(type, dev, &info.info, NULL);
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}
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int sparx5_add_mact_entry(struct sparx5 *sparx5,
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struct net_device *dev,
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u16 portno,
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const unsigned char *addr, u16 vid)
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{
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struct sparx5_mact_entry *mact_entry;
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int ret;
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u32 cfg2;
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ret = sparx5_mact_find(sparx5, addr, vid, &cfg2);
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if (!ret)
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return 0;
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/* In case the entry already exists, don't add it again to SW,
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* just update HW, but we need to look in the actual HW because
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* it is possible for an entry to be learn by HW and before the
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* mact thread to start the frame will reach CPU and the CPU will
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* add the entry but without the extern_learn flag.
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*/
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mact_entry = find_mact_entry(sparx5, addr, vid, portno);
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if (mact_entry)
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goto update_hw;
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/* Add the entry in SW MAC table not to get the notification when
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* SW is pulling again
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*/
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mact_entry = alloc_mact_entry(sparx5, addr, vid, portno);
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if (!mact_entry)
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return -ENOMEM;
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mutex_lock(&sparx5->mact_lock);
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list_add_tail(&mact_entry->list, &sparx5->mact_entries);
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mutex_unlock(&sparx5->mact_lock);
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update_hw:
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ret = sparx5_mact_learn(sparx5, portno, addr, vid);
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/* New entry? */
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if (mact_entry->flags == 0) {
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mact_entry->flags |= MAC_ENT_LOCK; /* Don't age this */
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sparx5_fdb_call_notifiers(SWITCHDEV_FDB_ADD_TO_BRIDGE, addr, vid,
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dev, true);
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}
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return ret;
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}
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int sparx5_del_mact_entry(struct sparx5 *sparx5,
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const unsigned char *addr,
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u16 vid)
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{
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struct sparx5_mact_entry *mact_entry, *tmp;
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/* Delete the entry in SW MAC table not to get the notification when
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* SW is pulling again
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*/
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mutex_lock(&sparx5->mact_lock);
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list_for_each_entry_safe(mact_entry, tmp, &sparx5->mact_entries,
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list) {
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if ((vid == 0 || mact_entry->vid == vid) &&
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ether_addr_equal(addr, mact_entry->mac)) {
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sparx5_mact_forget(sparx5, addr, mact_entry->vid);
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list_del(&mact_entry->list);
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devm_kfree(sparx5->dev, mact_entry);
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}
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}
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mutex_unlock(&sparx5->mact_lock);
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return 0;
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}
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static void sparx5_mact_handle_entry(struct sparx5 *sparx5,
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unsigned char mac[ETH_ALEN],
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u16 vid, u32 cfg2)
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{
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struct sparx5_mact_entry *mact_entry;
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bool found = false;
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u16 port;
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if (LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE_GET(cfg2) !=
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MAC_ENTRY_ADDR_TYPE_UPSID_PN)
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return;
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port = LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(cfg2);
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if (port >= SPX5_PORTS)
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return;
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if (!test_bit(port, sparx5->bridge_mask))
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return;
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mutex_lock(&sparx5->mact_lock);
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list_for_each_entry(mact_entry, &sparx5->mact_entries, list) {
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if (mact_entry->vid == vid &&
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ether_addr_equal(mac, mact_entry->mac)) {
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found = true;
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mact_entry->flags |= MAC_ENT_ALIVE;
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if (mact_entry->port != port) {
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dev_warn(sparx5->dev, "Entry move: %d -> %d\n",
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mact_entry->port, port);
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mact_entry->port = port;
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mact_entry->flags |= MAC_ENT_MOVED;
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}
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/* Entry handled */
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break;
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}
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}
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mutex_unlock(&sparx5->mact_lock);
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if (found && !(mact_entry->flags & MAC_ENT_MOVED))
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/* Present, not moved */
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return;
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if (!found) {
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/* Entry not found - now add */
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mact_entry = alloc_mact_entry(sparx5, mac, vid, port);
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if (!mact_entry)
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return;
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mact_entry->flags |= MAC_ENT_ALIVE;
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mutex_lock(&sparx5->mact_lock);
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list_add_tail(&mact_entry->list, &sparx5->mact_entries);
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mutex_unlock(&sparx5->mact_lock);
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}
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/* New or moved entry - notify bridge */
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sparx5_fdb_call_notifiers(SWITCHDEV_FDB_ADD_TO_BRIDGE,
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mac, vid, sparx5->ports[port]->ndev,
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true);
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}
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void sparx5_mact_pull_work(struct work_struct *work)
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{
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struct delayed_work *del_work = to_delayed_work(work);
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struct sparx5 *sparx5 = container_of(del_work, struct sparx5,
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mact_work);
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struct sparx5_mact_entry *mact_entry, *tmp;
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unsigned char mac[ETH_ALEN];
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u32 cfg2;
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u16 vid;
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int ret;
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/* Reset MAC entry flags */
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mutex_lock(&sparx5->mact_lock);
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list_for_each_entry(mact_entry, &sparx5->mact_entries, list)
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mact_entry->flags &= MAC_ENT_LOCK;
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mutex_unlock(&sparx5->mact_lock);
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/* MAIN mac address processing loop */
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vid = 0;
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memset(mac, 0, sizeof(mac));
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do {
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mutex_lock(&sparx5->lock);
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sparx5_mact_select(sparx5, mac, vid);
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spx5_wr(LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA_SET(1),
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sparx5, LRN_SCAN_NEXT_CFG);
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spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET
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(MAC_CMD_FIND_SMALLEST) |
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LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
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sparx5, LRN_COMMON_ACCESS_CTRL);
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ret = sparx5_mact_wait_for_completion(sparx5);
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if (ret == 0)
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ret = sparx5_mact_get(sparx5, mac, &vid, &cfg2);
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mutex_unlock(&sparx5->lock);
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if (ret == 0)
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sparx5_mact_handle_entry(sparx5, mac, vid, cfg2);
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} while (ret == 0);
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mutex_lock(&sparx5->mact_lock);
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list_for_each_entry_safe(mact_entry, tmp, &sparx5->mact_entries,
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list) {
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/* If the entry is in HW or permanent, then skip */
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if (mact_entry->flags & (MAC_ENT_ALIVE | MAC_ENT_LOCK))
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continue;
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sparx5_fdb_call_notifiers(SWITCHDEV_FDB_DEL_TO_BRIDGE,
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mact_entry->mac, mact_entry->vid,
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|
sparx5->ports[mact_entry->port]->ndev,
|
|
true);
|
|
|
|
list_del(&mact_entry->list);
|
|
devm_kfree(sparx5->dev, mact_entry);
|
|
}
|
|
mutex_unlock(&sparx5->mact_lock);
|
|
|
|
queue_delayed_work(sparx5->mact_queue, &sparx5->mact_work,
|
|
SPX5_MACT_PULL_DELAY);
|
|
}
|
|
|
|
void sparx5_set_ageing(struct sparx5 *sparx5, int msecs)
|
|
{
|
|
int value = max(1, msecs / 10); /* unit 10 ms */
|
|
|
|
spx5_rmw(LRN_AUTOAGE_CFG_UNIT_SIZE_SET(2) | /* 10 ms */
|
|
LRN_AUTOAGE_CFG_PERIOD_VAL_SET(value / 2), /* one bit ageing */
|
|
LRN_AUTOAGE_CFG_UNIT_SIZE |
|
|
LRN_AUTOAGE_CFG_PERIOD_VAL,
|
|
sparx5,
|
|
LRN_AUTOAGE_CFG(0));
|
|
}
|
|
|
|
void sparx5_mact_init(struct sparx5 *sparx5)
|
|
{
|
|
mutex_init(&sparx5->lock);
|
|
|
|
/* Flush MAC table */
|
|
spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(MAC_CMD_CLEAR_ALL) |
|
|
LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(1),
|
|
sparx5, LRN_COMMON_ACCESS_CTRL);
|
|
|
|
if (sparx5_mact_wait_for_completion(sparx5) != 0)
|
|
dev_warn(sparx5->dev, "MAC flush error\n");
|
|
|
|
sparx5_set_ageing(sparx5, BR_DEFAULT_AGEING_TIME / HZ * 1000);
|
|
}
|