38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Applied Micro X-Gene SoC Ethernet Driver
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*
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* Copyright (c) 2014, Applied Micro Circuits Corporation
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* Authors: Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*/
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#ifndef __XGENE_ENET_SGMAC_H__
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#define __XGENE_ENET_SGMAC_H__
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#define PHY_ADDR(src) (((src)<<8) & GENMASK(12, 8))
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#define REG_ADDR(src) ((src) & GENMASK(4, 0))
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#define PHY_CONTROL(src) ((src) & GENMASK(15, 0))
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#define LINK_SPEED(src) (((src) & GENMASK(11, 10)) >> 10)
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#define INT_PHY_ADDR 0x1e
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#define SGMII_TBI_CONTROL_ADDR 0x44
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#define SGMII_CONTROL_ADDR 0x00
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#define SGMII_STATUS_ADDR 0x04
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#define SGMII_BASE_PAGE_ABILITY_ADDR 0x14
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#define AUTO_NEG_COMPLETE BIT(5)
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#define LINK_STATUS BIT(2)
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#define LINK_UP BIT(15)
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#define MPA_IDLE_WITH_QMI_EMPTY BIT(12)
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#define SG_RX_DV_GATE_REG_0_ADDR 0x05fc
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#define SGMII_EN 0x1
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enum xgene_phy_speed {
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PHY_SPEED_10,
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PHY_SPEED_100,
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PHY_SPEED_1000
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};
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extern const struct xgene_mac_ops xgene_sgmac_ops;
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extern const struct xgene_port_ops xgene_sgport_ops;
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#endif /* __XGENE_ENET_SGMAC_H__ */
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