110 lines
2.6 KiB
C
110 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/of_device.h>
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#include <linux/qcom_scm.h>
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#include "arm-smmu.h"
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struct qcom_smmu {
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struct arm_smmu_device smmu;
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};
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static const struct of_device_id qcom_smmu_client_of_match[] = {
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{ .compatible = "qcom,adreno" },
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{ .compatible = "qcom,mdp4" },
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{ .compatible = "qcom,mdss" },
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{ .compatible = "qcom,sc7180-mdss" },
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{ .compatible = "qcom,sdm845-mdss" },
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{ }
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};
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static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
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{
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u32 smr;
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int i;
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for (i = 0; i < smmu->num_mapping_groups; i++) {
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smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i));
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if (FIELD_GET(ARM_SMMU_SMR_VALID, smr)) {
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/* Ignore valid bit for SMR mask extraction. */
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smr &= ~ARM_SMMU_SMR_VALID;
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smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr);
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smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr);
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smmu->smrs[i].valid = true;
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smmu->s2crs[i].type = S2CR_TYPE_BYPASS;
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smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT;
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smmu->s2crs[i].cbndx = 0xff;
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}
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}
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return 0;
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}
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static int qcom_smmu_def_domain_type(struct device *dev)
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{
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const struct of_device_id *match =
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of_match_device(qcom_smmu_client_of_match, dev);
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return match ? IOMMU_DOMAIN_IDENTITY : 0;
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}
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static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu)
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{
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int ret;
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/*
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* To address performance degradation in non-real time clients,
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* such as USB and UFS, turn off wait-for-safe on sdm845 based boards,
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* such as MTP and db845, whose firmwares implement secure monitor
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* call handlers to turn on/off the wait-for-safe logic.
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*/
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ret = qcom_scm_qsmmu500_wait_safe_toggle(0);
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if (ret)
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dev_warn(smmu->dev, "Failed to turn off SAFE logic\n");
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return ret;
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}
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static int qcom_smmu500_reset(struct arm_smmu_device *smmu)
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{
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const struct device_node *np = smmu->dev->of_node;
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arm_mmu500_reset(smmu);
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if (of_device_is_compatible(np, "qcom,sdm845-smmu-500"))
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return qcom_sdm845_smmu500_reset(smmu);
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return 0;
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}
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static const struct arm_smmu_impl qcom_smmu_impl = {
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.cfg_probe = qcom_smmu_cfg_probe,
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.def_domain_type = qcom_smmu_def_domain_type,
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.reset = qcom_smmu500_reset,
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};
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struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
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{
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struct qcom_smmu *qsmmu;
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/* Check to make sure qcom_scm has finished probing */
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if (!qcom_scm_is_available())
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return ERR_PTR(-EPROBE_DEFER);
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qsmmu = devm_kzalloc(smmu->dev, sizeof(*qsmmu), GFP_KERNEL);
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if (!qsmmu)
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return ERR_PTR(-ENOMEM);
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qsmmu->smmu = *smmu;
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qsmmu->smmu.impl = &qcom_smmu_impl;
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devm_kfree(smmu->dev, smmu);
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return &qsmmu->smmu;
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}
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