236 lines
7.5 KiB
C
236 lines
7.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef __SND_AR_TOKENS_H__
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#define __SND_AR_TOKENS_H__
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#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1
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#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2
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#define APM_SUB_GRAPH_DIRECTION_TX 0x1
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#define APM_SUB_GRAPH_DIRECTION_RX 0x2
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/** Scenario ID Audio Playback */
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#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
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/* Scenario ID Audio Record */
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#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
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/* Scenario ID Voice call. */
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#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3
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/* container capability ID Pre/Post Processing (PP) */
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#define APM_CONTAINER_CAP_ID_PP 0x1
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/* container capability ID Compression/Decompression (CD) */
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#define APM_CONTAINER_CAP_ID_CD 0x2
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/* container capability ID End Point(EP) */
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#define APM_CONTAINER_CAP_ID_EP 0x3
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/* container capability ID Offload (OLC) */
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#define APM_CONTAINER_CAP_ID_OLC 0x4
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/* container graph position Stream */
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#define APM_CONT_GRAPH_POS_STREAM 0x1
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/* container graph position Per Stream Per Device*/
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#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2
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/* container graph position Stream-Device */
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#define APM_CONT_GRAPH_POS_STR_DEV 0x3
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/* container graph position Global Device */
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#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4
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#define APM_PROC_DOMAIN_ID_MDSP 0x1
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#define APM_PROC_DOMAIN_ID_ADSP 0x2
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#define APM_PROC_DOMAIN_ID_SDSP 0x4
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#define APM_PROC_DOMAIN_ID_CDSP 0x5
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#define PCM_INTERLEAVED 1
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#define PCM_DEINTERLEAVED_PACKED 2
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#define PCM_DEINTERLEAVED_UNPACKED 3
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#define AR_I2S_WS_SRC_EXTERNAL 0
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#define AR_I2S_WS_SRC_INTERNAL 1
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enum ar_event_types {
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AR_EVENT_NONE = 0,
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AR_PGA_DAPM_EVENT
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};
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/*
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* Kcontrol IDs
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*/
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#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256
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#define SND_SOC_AR_TPLG_VOL_CTL 257
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/**
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* %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
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*
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* %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
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* APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1,
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* APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2
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*
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* %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph
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* APM_SUB_GRAPH_DIRECTION_TX = 1,
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* APM_SUB_GRAPH_DIRECTION_RX = 2
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*
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* %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph
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* APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1,
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* APM_SUB_GRAPH_SID_AUDIO_RECORD = 2,
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* APM_SUB_GRAPH_SID_VOICE_CALL = 3
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*
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* %AR_TKN_U32_CONTAINER_INSTANCE_ID: Container Instance ID
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*
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* %AR_TKN_U32_CONTAINER_CAPABILITY_ID: Container capability ID
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* APM_CONTAINER_CAP_ID_PP = 1,
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* APM_CONTAINER_CAP_ID_CD = 2,
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* APM_CONTAINER_CAP_ID_EP = 3,
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* APM_CONTAINER_CAP_ID_OLC = 4
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*
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* %AR_TKN_U32_CONTAINER_STACK_SIZE: Stack size in the container.
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*
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* %AR_TKN_U32_CONTAINER_GRAPH_POS: Graph Position
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* APM_CONT_GRAPH_POS_STREAM = 1,
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* APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2,
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* APM_CONT_GRAPH_POS_STR_DEV = 3,
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* APM_CONT_GRAPH_POS_GLOBAL_DEV = 4
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*
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* %AR_TKN_U32_CONTAINER_PROC_DOMAIN: Processor domain of container
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* APM_PROC_DOMAIN_ID_MDSP = 1,
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* APM_PROC_DOMAIN_ID_ADSP = 2,
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* APM_PROC_DOMAIN_ID_SDSP = 4,
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* APM_PROC_DOMAIN_ID_CDSP = 5
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*
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* %AR_TKN_U32_MODULE_ID: Module ID
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*
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* %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID.
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*
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* %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports
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*
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* %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports.
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*
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* %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports
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*
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* %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports.
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*
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* %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID
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*
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* %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID
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*
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* %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF
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*
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* %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type
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* LPAIF = 0,
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* LPAIF_RXTX = 1,
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* LPAIF_WSA = 2,
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* LPAIF_VA = 3,
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* LPAIF_AXI = 4
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*
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* %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving
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* PCM_INTERLEAVED = 1,
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* PCM_DEINTERLEAVED_PACKED = 2,
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* PCM_DEINTERLEAVED_UNPACKED = 3
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*
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* %AR_TKN_U32_MODULE_FMT_DATA: data format
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* FIXED POINT = 1,
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* IEC60958 PACKETIZED = 3,
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* IEC60958 PACKETIZED NON LINEAR = 8,
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* COMPR OVER PCM PACKETIZED = 7,
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* IEC61937 PACKETIZED = 2,
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* GENERIC COMPRESSED = 5
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*
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* %AR_TKN_U32_MODULE_FMT_SAMPLE_RATE: sample rate
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*
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* %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth
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*
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* %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx
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* I2S_SD0 = 1,
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* I2S_SD1 = 2,
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* I2S_SD2 = 3,
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* I2S_SD3 = 4,
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* I2S_QUAD01 = 5,
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* I2S_QUAD23 = 6,
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* I2S_6CHS = 7,
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* I2S_8CHS = 8
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*
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* %AR_TKN_U32_MODULE_WS_SRC: Word Select Source
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* AR_I2S_WS_SRC_EXTERNAL = 0,
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* AR_I2S_WS_SRC_INTERNAL = 1,
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*
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* %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor
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*
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* %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code
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*
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* %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module
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*
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* %AR_TKN_U32_MODULE_LOG_MODE: logging mode
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* LOG_WAIT = 0,
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* LOG_IMMEDIATELY = 1
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*
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* %AR_TKN_DAI_INDEX: dai index
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*
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*/
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/* DAI Tokens */
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#define AR_TKN_DAI_INDEX 1
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/* SUB GRAPH Tokens */
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#define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2
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#define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3
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#define AR_TKN_U32_SUB_GRAPH_DIRECTION 4
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#define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5
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/* Container Tokens */
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#define AR_TKN_U32_CONTAINER_INSTANCE_ID 100
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#define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101
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#define AR_TKN_U32_CONTAINER_STACK_SIZE 102
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#define AR_TKN_U32_CONTAINER_GRAPH_POS 103
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#define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104
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/* Module Tokens */
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#define AR_TKN_U32_MODULE_ID 200
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#define AR_TKN_U32_MODULE_INSTANCE_ID 201
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#define AR_TKN_U32_MODULE_MAX_IP_PORTS 202
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#define AR_TKN_U32_MODULE_MAX_OP_PORTS 203
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#define AR_TKN_U32_MODULE_IN_PORTS 204
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#define AR_TKN_U32_MODULE_OUT_PORTS 205
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207
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#define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID1 210
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID1 211
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID1 212
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID2 213
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID2 214
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID2 215
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID3 216
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID3 217
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID3 218
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID4 219
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID4 220
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID4 221
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID5 222
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID5 223
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID5 224
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID6 225
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID6 226
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID6 227
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID7 228
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID7 229
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID7 230
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#define AR_TKN_U32_MODULE_HW_IF_IDX 250
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#define AR_TKN_U32_MODULE_HW_IF_TYPE 251
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#define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252
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#define AR_TKN_U32_MODULE_FMT_DATA 253
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#define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254
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#define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255
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#define AR_TKN_U32_MODULE_SD_LINE_IDX 256
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#define AR_TKN_U32_MODULE_WS_SRC 257
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#define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258
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#define AR_TKN_U32_MODULE_LOG_CODE 259
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#define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260
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#define AR_TKN_U32_MODULE_LOG_MODE 261
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#endif /* __SND_AR_TOKENS_H__ */
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