99 lines
1.8 KiB
C
99 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __LINUX_REGULATOR_MT6358_H
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#define __LINUX_REGULATOR_MT6358_H
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enum {
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MT6358_ID_VDRAM1 = 0,
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MT6358_ID_VCORE,
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MT6358_ID_VPA,
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MT6358_ID_VPROC11,
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MT6358_ID_VPROC12,
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MT6358_ID_VGPU,
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MT6358_ID_VS2,
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MT6358_ID_VMODEM,
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MT6358_ID_VS1,
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MT6358_ID_VDRAM2 = 9,
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MT6358_ID_VSIM1,
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MT6358_ID_VIBR,
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MT6358_ID_VRF12,
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MT6358_ID_VIO18,
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MT6358_ID_VUSB,
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MT6358_ID_VCAMIO,
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MT6358_ID_VCAMD,
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MT6358_ID_VCN18,
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MT6358_ID_VFE28,
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MT6358_ID_VSRAM_PROC11,
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MT6358_ID_VCN28,
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MT6358_ID_VSRAM_OTHERS,
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MT6358_ID_VSRAM_GPU,
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MT6358_ID_VXO22,
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MT6358_ID_VEFUSE,
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MT6358_ID_VAUX18,
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MT6358_ID_VMCH,
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MT6358_ID_VBIF28,
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MT6358_ID_VSRAM_PROC12,
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MT6358_ID_VCAMA1,
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MT6358_ID_VEMC,
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MT6358_ID_VIO28,
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MT6358_ID_VA12,
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MT6358_ID_VRF18,
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MT6358_ID_VCN33,
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MT6358_ID_VCAMA2,
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MT6358_ID_VMC,
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MT6358_ID_VLDO28,
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MT6358_ID_VAUD28,
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MT6358_ID_VSIM2,
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MT6358_ID_RG_MAX,
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};
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enum {
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MT6366_ID_VDRAM1 = 0,
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MT6366_ID_VCORE,
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MT6366_ID_VPA,
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MT6366_ID_VPROC11,
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MT6366_ID_VPROC12,
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MT6366_ID_VGPU,
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MT6366_ID_VS2,
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MT6366_ID_VMODEM,
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MT6366_ID_VS1,
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MT6366_ID_VDRAM2,
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MT6366_ID_VSIM1,
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MT6366_ID_VIBR,
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MT6366_ID_VRF12,
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MT6366_ID_VIO18,
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MT6366_ID_VUSB,
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MT6366_ID_VCN18,
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MT6366_ID_VFE28,
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MT6366_ID_VSRAM_PROC11,
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MT6366_ID_VCN28,
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MT6366_ID_VSRAM_OTHERS,
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MT6366_ID_VSRAM_GPU,
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MT6366_ID_VXO22,
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MT6366_ID_VEFUSE,
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MT6366_ID_VAUX18,
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MT6366_ID_VMCH,
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MT6366_ID_VBIF28,
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MT6366_ID_VSRAM_PROC12,
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MT6366_ID_VEMC,
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MT6366_ID_VIO28,
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MT6366_ID_VA12,
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MT6366_ID_VRF18,
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MT6366_ID_VCN33,
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MT6366_ID_VMC,
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MT6366_ID_VAUD28,
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MT6366_ID_VSIM2,
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MT6366_ID_VM18,
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MT6366_ID_VMDDR,
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MT6366_ID_VSRAM_CORE,
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MT6366_ID_RG_MAX,
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};
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#define MT6358_MAX_REGULATOR MT6358_ID_RG_MAX
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#define MT6366_MAX_REGULATOR MT6366_ID_RG_MAX
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#endif /* __LINUX_REGULATOR_MT6358_H */
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