111 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			111 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * TI/National Semiconductor LP3943 Device
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|  *
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|  * Copyright 2013 Texas Instruments
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|  *
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|  * Author: Milo Kim <milo.kim@ti.com>
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|  */
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| 
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| #ifndef __MFD_LP3943_H__
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| #define __MFD_LP3943_H__
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| 
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| #include <linux/gpio.h>
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| #include <linux/pwm.h>
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| #include <linux/regmap.h>
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| 
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| /* Registers */
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| #define LP3943_REG_GPIO_A		0x00
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| #define LP3943_REG_GPIO_B		0x01
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| #define LP3943_REG_PRESCALE0		0x02
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| #define LP3943_REG_PWM0			0x03
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| #define LP3943_REG_PRESCALE1		0x04
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| #define LP3943_REG_PWM1			0x05
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| #define LP3943_REG_MUX0			0x06
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| #define LP3943_REG_MUX1			0x07
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| #define LP3943_REG_MUX2			0x08
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| #define LP3943_REG_MUX3			0x09
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| 
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| /* Bit description for LP3943_REG_MUX0 ~ 3 */
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| #define LP3943_GPIO_IN			0x00
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| #define LP3943_GPIO_OUT_HIGH		0x00
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| #define LP3943_GPIO_OUT_LOW		0x01
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| #define LP3943_DIM_PWM0			0x02
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| #define LP3943_DIM_PWM1			0x03
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| 
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| #define LP3943_NUM_PWMS			2
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| 
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| enum lp3943_pwm_output {
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| 	LP3943_PWM_OUT0,
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| 	LP3943_PWM_OUT1,
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| 	LP3943_PWM_OUT2,
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| 	LP3943_PWM_OUT3,
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| 	LP3943_PWM_OUT4,
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| 	LP3943_PWM_OUT5,
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| 	LP3943_PWM_OUT6,
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| 	LP3943_PWM_OUT7,
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| 	LP3943_PWM_OUT8,
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| 	LP3943_PWM_OUT9,
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| 	LP3943_PWM_OUT10,
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| 	LP3943_PWM_OUT11,
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| 	LP3943_PWM_OUT12,
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| 	LP3943_PWM_OUT13,
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| 	LP3943_PWM_OUT14,
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| 	LP3943_PWM_OUT15,
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| };
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| 
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| /*
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|  * struct lp3943_pwm_map
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|  * @output: Output pins which are mapped to each PWM channel
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|  * @num_outputs: Number of outputs
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|  */
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| struct lp3943_pwm_map {
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| 	enum lp3943_pwm_output *output;
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| 	int num_outputs;
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| };
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| 
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| /*
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|  * struct lp3943_platform_data
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|  * @pwms: Output channel definitions for PWM channel 0 and 1
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|  */
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| struct lp3943_platform_data {
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| 	struct lp3943_pwm_map *pwms[LP3943_NUM_PWMS];
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| };
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| 
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| /*
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|  * struct lp3943_reg_cfg
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|  * @reg: Register address
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|  * @mask: Register bit mask to be updated
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|  * @shift: Register bit shift
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|  */
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| struct lp3943_reg_cfg {
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| 	u8 reg;
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| 	u8 mask;
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| 	u8 shift;
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| };
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| 
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| /*
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|  * struct lp3943
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|  * @dev: Parent device pointer
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|  * @regmap: Used for I2C communication on accessing registers
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|  * @pdata: LP3943 platform specific data
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|  * @mux_cfg: Register configuration for pin MUX
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|  * @pin_used: Bit mask for output pin used.
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|  *	      This bitmask is used for pin assignment management.
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|  *	      1 = pin used, 0 = available.
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|  *	      Only LSB 16 bits are used, but it is unsigned long type
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|  *	      for atomic bitwise operations.
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|  */
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| struct lp3943 {
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| 	struct device *dev;
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| 	struct regmap *regmap;
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| 	struct lp3943_platform_data *pdata;
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| 	const struct lp3943_reg_cfg *mux_cfg;
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| 	unsigned long pin_used;
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| };
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| 
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| int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read);
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| int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data);
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| int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data);
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| #endif
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