39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H
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#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H
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/* VIDEO_CC clocks */
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#define VIDEO_CC_MVS0_CLK 0
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#define VIDEO_CC_MVS0_CLK_SRC 1
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#define VIDEO_CC_MVS0_DIV_CLK_SRC 2
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#define VIDEO_CC_MVS0C_CLK 3
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#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 4
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#define VIDEO_CC_MVS1_CLK 5
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#define VIDEO_CC_MVS1_CLK_SRC 6
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#define VIDEO_CC_MVS1_DIV_CLK_SRC 7
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#define VIDEO_CC_MVS1C_CLK 8
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#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 9
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#define VIDEO_CC_PLL0 10
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#define VIDEO_CC_PLL1 11
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/* VIDEO_CC power domains */
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#define VIDEO_CC_MVS0C_GDSC 0
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#define VIDEO_CC_MVS0_GDSC 1
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#define VIDEO_CC_MVS1C_GDSC 2
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#define VIDEO_CC_MVS1_GDSC 3
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/* VIDEO_CC resets */
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#define CVP_VIDEO_CC_INTERFACE_BCR 0
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#define CVP_VIDEO_CC_MVS0_BCR 1
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#define CVP_VIDEO_CC_MVS0C_BCR 2
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#define CVP_VIDEO_CC_MVS1_BCR 3
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#define CVP_VIDEO_CC_MVS1C_BCR 4
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#define VIDEO_CC_MVS0C_CLK_ARES 5
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#define VIDEO_CC_MVS1C_CLK_ARES 6
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#endif
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