180 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			180 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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| /*
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|  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
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|  * Copyright (c) 2023, Linaro Ltd.
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|  */
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| 
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| #ifndef __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__
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| #define __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__
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| 
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| /* CAMCC clocks */
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| #define CAMCC_PLL0					0
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| #define CAMCC_PLL0_OUT_EVEN				1
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| #define CAMCC_PLL0_OUT_ODD				2
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| #define CAMCC_PLL1					3
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| #define CAMCC_PLL1_OUT_EVEN				4
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| #define CAMCC_PLL2					5
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| #define CAMCC_PLL3					6
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| #define CAMCC_PLL3_OUT_EVEN				7
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| #define CAMCC_PLL4					8
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| #define CAMCC_PLL4_OUT_EVEN				9
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| #define CAMCC_PLL5					10
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| #define CAMCC_PLL5_OUT_EVEN				11
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| #define CAMCC_PLL6					12
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| #define CAMCC_PLL6_OUT_EVEN				13
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| #define CAMCC_PLL7					14
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| #define CAMCC_PLL7_OUT_EVEN				15
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| #define CAMCC_PLL7_OUT_ODD				16
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| #define CAMCC_BPS_AHB_CLK				17
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| #define CAMCC_BPS_AREG_CLK				18
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| #define CAMCC_BPS_AXI_CLK				19
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| #define CAMCC_BPS_CLK					20
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| #define CAMCC_BPS_CLK_SRC				21
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| #define CAMCC_CAMNOC_AXI_CLK				22
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| #define CAMCC_CAMNOC_AXI_CLK_SRC			23
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| #define CAMCC_CAMNOC_DCD_XO_CLK				24
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| #define CAMCC_CCI_0_CLK					25
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| #define CAMCC_CCI_0_CLK_SRC				26
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| #define CAMCC_CCI_1_CLK					27
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| #define CAMCC_CCI_1_CLK_SRC				28
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| #define CAMCC_CCI_2_CLK					29
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| #define CAMCC_CCI_2_CLK_SRC				30
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| #define CAMCC_CCI_3_CLK					31
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| #define CAMCC_CCI_3_CLK_SRC				32
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| #define CAMCC_CORE_AHB_CLK				33
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| #define CAMCC_CPAS_AHB_CLK				34
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| #define CAMCC_CPHY_RX_CLK_SRC				35
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| #define CAMCC_CSI0PHYTIMER_CLK				36
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| #define CAMCC_CSI0PHYTIMER_CLK_SRC			37
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| #define CAMCC_CSI1PHYTIMER_CLK				38
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| #define CAMCC_CSI1PHYTIMER_CLK_SRC			39
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| #define CAMCC_CSI2PHYTIMER_CLK				40
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| #define CAMCC_CSI2PHYTIMER_CLK_SRC			41
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| #define CAMCC_CSI3PHYTIMER_CLK				42
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| #define CAMCC_CSI3PHYTIMER_CLK_SRC			43
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| #define CAMCC_CSIPHY0_CLK				44
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| #define CAMCC_CSIPHY1_CLK				45
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| #define CAMCC_CSIPHY2_CLK				46
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| #define CAMCC_CSIPHY3_CLK				47
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| #define CAMCC_FAST_AHB_CLK_SRC				48
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| #define CAMCC_GDSC_CLK					49
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| #define CAMCC_ICP_AHB_CLK				50
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| #define CAMCC_ICP_CLK					51
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| #define CAMCC_ICP_CLK_SRC				52
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| #define CAMCC_IFE_0_AXI_CLK				53
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| #define CAMCC_IFE_0_CLK					54
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| #define CAMCC_IFE_0_CLK_SRC				55
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| #define CAMCC_IFE_0_CPHY_RX_CLK				56
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| #define CAMCC_IFE_0_CSID_CLK				57
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| #define CAMCC_IFE_0_CSID_CLK_SRC			58
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| #define CAMCC_IFE_0_DSP_CLK				59
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| #define CAMCC_IFE_1_AXI_CLK				60
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| #define CAMCC_IFE_1_CLK					61
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| #define CAMCC_IFE_1_CLK_SRC				62
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| #define CAMCC_IFE_1_CPHY_RX_CLK				63
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| #define CAMCC_IFE_1_CSID_CLK				64
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| #define CAMCC_IFE_1_CSID_CLK_SRC			65
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| #define CAMCC_IFE_1_DSP_CLK				66
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| #define CAMCC_IFE_2_AXI_CLK				67
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| #define CAMCC_IFE_2_CLK					68
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| #define CAMCC_IFE_2_CLK_SRC				69
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| #define CAMCC_IFE_2_CPHY_RX_CLK				70
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| #define CAMCC_IFE_2_CSID_CLK				71
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| #define CAMCC_IFE_2_CSID_CLK_SRC			72
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| #define CAMCC_IFE_2_DSP_CLK				73
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| #define CAMCC_IFE_3_AXI_CLK				74
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| #define CAMCC_IFE_3_CLK					75
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| #define CAMCC_IFE_3_CLK_SRC				76
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| #define CAMCC_IFE_3_CPHY_RX_CLK				77
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| #define CAMCC_IFE_3_CSID_CLK				78
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| #define CAMCC_IFE_3_CSID_CLK_SRC			79
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| #define CAMCC_IFE_3_DSP_CLK				80
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| #define CAMCC_IFE_LITE_0_CLK				81
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| #define CAMCC_IFE_LITE_0_CLK_SRC			82
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| #define CAMCC_IFE_LITE_0_CPHY_RX_CLK			83
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| #define CAMCC_IFE_LITE_0_CSID_CLK			84
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| #define CAMCC_IFE_LITE_0_CSID_CLK_SRC			85
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| #define CAMCC_IFE_LITE_1_CLK				86
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| #define CAMCC_IFE_LITE_1_CLK_SRC			87
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| #define CAMCC_IFE_LITE_1_CPHY_RX_CLK			88
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| #define CAMCC_IFE_LITE_1_CSID_CLK			89
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| #define CAMCC_IFE_LITE_1_CSID_CLK_SRC			90
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| #define CAMCC_IFE_LITE_2_CLK				91
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| #define CAMCC_IFE_LITE_2_CLK_SRC			92
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| #define CAMCC_IFE_LITE_2_CPHY_RX_CLK			93
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| #define CAMCC_IFE_LITE_2_CSID_CLK			94
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| #define CAMCC_IFE_LITE_2_CSID_CLK_SRC			95
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| #define CAMCC_IFE_LITE_3_CLK				96
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| #define CAMCC_IFE_LITE_3_CLK_SRC			97
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| #define CAMCC_IFE_LITE_3_CPHY_RX_CLK			98
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| #define CAMCC_IFE_LITE_3_CSID_CLK			99
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| #define CAMCC_IFE_LITE_3_CSID_CLK_SRC			100
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| #define CAMCC_IPE_0_AHB_CLK				101
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| #define CAMCC_IPE_0_AREG_CLK				102
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| #define CAMCC_IPE_0_AXI_CLK				103
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| #define CAMCC_IPE_0_CLK					104
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| #define CAMCC_IPE_0_CLK_SRC				105
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| #define CAMCC_IPE_1_AHB_CLK				106
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| #define CAMCC_IPE_1_AREG_CLK				107
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| #define CAMCC_IPE_1_AXI_CLK				108
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| #define CAMCC_IPE_1_CLK					109
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| #define CAMCC_JPEG_CLK					110
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| #define CAMCC_JPEG_CLK_SRC				111
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| #define CAMCC_LRME_CLK					112
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| #define CAMCC_LRME_CLK_SRC				113
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| #define CAMCC_MCLK0_CLK					114
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| #define CAMCC_MCLK0_CLK_SRC				115
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| #define CAMCC_MCLK1_CLK					116
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| #define CAMCC_MCLK1_CLK_SRC				117
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| #define CAMCC_MCLK2_CLK					118
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| #define CAMCC_MCLK2_CLK_SRC				119
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| #define CAMCC_MCLK3_CLK					120
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| #define CAMCC_MCLK3_CLK_SRC				121
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| #define CAMCC_MCLK4_CLK					122
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| #define CAMCC_MCLK4_CLK_SRC				123
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| #define CAMCC_MCLK5_CLK					124
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| #define CAMCC_MCLK5_CLK_SRC				125
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| #define CAMCC_MCLK6_CLK					126
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| #define CAMCC_MCLK6_CLK_SRC				127
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| #define CAMCC_MCLK7_CLK					128
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| #define CAMCC_MCLK7_CLK_SRC				129
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| #define CAMCC_SLEEP_CLK					130
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| #define CAMCC_SLEEP_CLK_SRC				131
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| #define CAMCC_SLOW_AHB_CLK_SRC				132
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| #define CAMCC_XO_CLK_SRC				133
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| 
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| /* CAMCC resets */
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| #define CAMCC_BPS_BCR					0
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| #define CAMCC_CAMNOC_BCR				1
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| #define CAMCC_CCI_BCR					2
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| #define CAMCC_CPAS_BCR					3
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| #define CAMCC_CSI0PHY_BCR				4
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| #define CAMCC_CSI1PHY_BCR				5
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| #define CAMCC_CSI2PHY_BCR				6
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| #define CAMCC_CSI3PHY_BCR				7
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| #define CAMCC_ICP_BCR					8
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| #define CAMCC_IFE_0_BCR					9
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| #define CAMCC_IFE_1_BCR					10
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| #define CAMCC_IFE_2_BCR					11
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| #define CAMCC_IFE_3_BCR					12
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| #define CAMCC_IFE_LITE_0_BCR				13
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| #define CAMCC_IFE_LITE_1_BCR				14
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| #define CAMCC_IFE_LITE_2_BCR				15
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| #define CAMCC_IFE_LITE_3_BCR				16
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| #define CAMCC_IPE_0_BCR					17
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| #define CAMCC_IPE_1_BCR					18
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| #define CAMCC_JPEG_BCR					19
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| #define CAMCC_LRME_BCR					20
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| 
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| /* CAMCC GDSCRs */
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| #define BPS_GDSC					0
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| #define IFE_0_GDSC					1
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| #define IFE_1_GDSC					2
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| #define IFE_2_GDSC					3
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| #define IFE_3_GDSC					4
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| #define IPE_0_GDSC					5
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| #define IPE_1_GDSC					6
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| #define TITAN_TOP_GDSC					7
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| 
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| #endif /* __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__ */
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