313 lines
12 KiB
ReStructuredText
313 lines
12 KiB
ReStructuredText
========================
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The Common Clk Framework
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========================
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:Author: Mike Turquette <mturquette@ti.com>
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This document endeavours to explain the common clk framework details,
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and how to port a platform over to this framework. It is not yet a
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detailed explanation of the clock api in include/linux/clk.h, but
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perhaps someday it will include that information.
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Introduction and interface split
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================================
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The common clk framework is an interface to control the clock nodes
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available on various devices today. This may come in the form of clock
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gating, rate adjustment, muxing or other operations. This framework is
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enabled with the CONFIG_COMMON_CLK option.
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The interface itself is divided into two halves, each shielded from the
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details of its counterpart. First is the common definition of struct
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clk which unifies the framework-level accounting and infrastructure that
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has traditionally been duplicated across a variety of platforms. Second
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is a common implementation of the clk.h api, defined in
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drivers/clk/clk.c. Finally there is struct clk_ops, whose operations
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are invoked by the clk api implementation.
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The second half of the interface is comprised of the hardware-specific
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callbacks registered with struct clk_ops and the corresponding
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hardware-specific structures needed to model a particular clock. For
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the remainder of this document any reference to a callback in struct
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clk_ops, such as .enable or .set_rate, implies the hardware-specific
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implementation of that code. Likewise, references to struct clk_foo
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serve as a convenient shorthand for the implementation of the
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hardware-specific bits for the hypothetical "foo" hardware.
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Tying the two halves of this interface together is struct clk_hw, which
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is defined in struct clk_foo and pointed to within struct clk_core. This
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allows for easy navigation between the two discrete halves of the common
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clock interface.
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Common data structures and api
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==============================
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Below is the common struct clk_core definition from
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drivers/clk/clk.c, modified for brevity::
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struct clk_core {
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const char *name;
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const struct clk_ops *ops;
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struct clk_hw *hw;
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struct module *owner;
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struct clk_core *parent;
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const char **parent_names;
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struct clk_core **parents;
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u8 num_parents;
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u8 new_parent_index;
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...
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};
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The members above make up the core of the clk tree topology. The clk
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api itself defines several driver-facing functions which operate on
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struct clk. That api is documented in include/linux/clk.h.
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Platforms and devices utilizing the common struct clk_core use the struct
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clk_ops pointer in struct clk_core to perform the hardware-specific parts of
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the operations defined in clk-provider.h::
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struct clk_ops {
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int (*prepare)(struct clk_hw *hw);
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void (*unprepare)(struct clk_hw *hw);
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int (*is_prepared)(struct clk_hw *hw);
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void (*unprepare_unused)(struct clk_hw *hw);
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int (*enable)(struct clk_hw *hw);
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void (*disable)(struct clk_hw *hw);
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int (*is_enabled)(struct clk_hw *hw);
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void (*disable_unused)(struct clk_hw *hw);
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unsigned long (*recalc_rate)(struct clk_hw *hw,
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unsigned long parent_rate);
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long (*round_rate)(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *parent_rate);
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int (*determine_rate)(struct clk_hw *hw,
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struct clk_rate_request *req);
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int (*set_parent)(struct clk_hw *hw, u8 index);
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u8 (*get_parent)(struct clk_hw *hw);
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int (*set_rate)(struct clk_hw *hw,
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unsigned long rate,
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unsigned long parent_rate);
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int (*set_rate_and_parent)(struct clk_hw *hw,
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unsigned long rate,
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unsigned long parent_rate,
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u8 index);
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unsigned long (*recalc_accuracy)(struct clk_hw *hw,
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unsigned long parent_accuracy);
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int (*get_phase)(struct clk_hw *hw);
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int (*set_phase)(struct clk_hw *hw, int degrees);
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void (*init)(struct clk_hw *hw);
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void (*debug_init)(struct clk_hw *hw,
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struct dentry *dentry);
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};
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Hardware clk implementations
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============================
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The strength of the common struct clk_core comes from its .ops and .hw pointers
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which abstract the details of struct clk from the hardware-specific bits, and
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vice versa. To illustrate consider the simple gateable clk implementation in
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drivers/clk/clk-gate.c::
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struct clk_gate {
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struct clk_hw hw;
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void __iomem *reg;
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u8 bit_idx;
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...
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};
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struct clk_gate contains struct clk_hw hw as well as hardware-specific
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knowledge about which register and bit controls this clk's gating.
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Nothing about clock topology or accounting, such as enable_count or
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notifier_count, is needed here. That is all handled by the common
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framework code and struct clk_core.
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Let's walk through enabling this clk from driver code::
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struct clk *clk;
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clk = clk_get(NULL, "my_gateable_clk");
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clk_prepare(clk);
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clk_enable(clk);
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The call graph for clk_enable is very simple::
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clk_enable(clk);
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clk->ops->enable(clk->hw);
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[resolves to...]
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clk_gate_enable(hw);
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[resolves struct clk gate with to_clk_gate(hw)]
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clk_gate_set_bit(gate);
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And the definition of clk_gate_set_bit::
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static void clk_gate_set_bit(struct clk_gate *gate)
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{
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u32 reg;
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reg = __raw_readl(gate->reg);
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reg |= BIT(gate->bit_idx);
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writel(reg, gate->reg);
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}
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Note that to_clk_gate is defined as::
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#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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This pattern of abstraction is used for every clock hardware
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representation.
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Supporting your own clk hardware
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================================
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When implementing support for a new type of clock it is only necessary to
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include the following header::
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#include <linux/clk-provider.h>
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To construct a clk hardware structure for your platform you must define
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the following::
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struct clk_foo {
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struct clk_hw hw;
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... hardware specific data goes here ...
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};
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To take advantage of your data you'll need to support valid operations
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for your clk::
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struct clk_ops clk_foo_ops = {
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.enable = &clk_foo_enable,
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.disable = &clk_foo_disable,
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};
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Implement the above functions using container_of::
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#define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
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int clk_foo_enable(struct clk_hw *hw)
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{
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struct clk_foo *foo;
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foo = to_clk_foo(hw);
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... perform magic on foo ...
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return 0;
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};
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Below is a matrix detailing which clk_ops are mandatory based upon the
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hardware capabilities of that clock. A cell marked as "y" means
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mandatory, a cell marked as "n" implies that either including that
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callback is invalid or otherwise unnecessary. Empty cells are either
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optional or must be evaluated on a case-by-case basis.
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.. table:: clock hardware characteristics
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+----------------+------+-------------+---------------+-------------+------+
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| | gate | change rate | single parent | multiplexer | root |
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+================+======+=============+===============+=============+======+
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|.prepare | | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.unprepare | | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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+----------------+------+-------------+---------------+-------------+------+
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|.enable | y | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.disable | y | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.is_enabled | y | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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+----------------+------+-------------+---------------+-------------+------+
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|.recalc_rate | | y | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.round_rate | | y [1]_ | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.determine_rate | | y [1]_ | | | |
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+----------------+------+-------------+---------------+-------------+------+
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|.set_rate | | y | | | |
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+----------------+------+-------------+---------------+-------------+------+
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+----------------+------+-------------+---------------+-------------+------+
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|.set_parent | | | n | y | n |
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+----------------+------+-------------+---------------+-------------+------+
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|.get_parent | | | n | y | n |
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+----------------+------+-------------+---------------+-------------+------+
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+----------------+------+-------------+---------------+-------------+------+
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|.recalc_accuracy| | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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+----------------+------+-------------+---------------+-------------+------+
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|.init | | | | | |
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+----------------+------+-------------+---------------+-------------+------+
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.. [1] either one of round_rate or determine_rate is required.
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Finally, register your clock at run-time with a hardware-specific
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registration function. This function simply populates struct clk_foo's
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data and then passes the common struct clk parameters to the framework
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with a call to::
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clk_register(...)
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See the basic clock types in ``drivers/clk/clk-*.c`` for examples.
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Disabling clock gating of unused clocks
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=======================================
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Sometimes during development it can be useful to be able to bypass the
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default disabling of unused clocks. For example, if drivers aren't enabling
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clocks properly but rely on them being on from the bootloader, bypassing
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the disabling means that the driver will remain functional while the issues
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are sorted out.
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You can see which clocks have been disabled by booting your kernel with these
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parameters::
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tp_printk trace_event=clk:clk_disable
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To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
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kernel.
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Locking
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=======
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The common clock framework uses two global locks, the prepare lock and the
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enable lock.
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The enable lock is a spinlock and is held across calls to the .enable,
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.disable operations. Those operations are thus not allowed to sleep,
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and calls to the clk_enable(), clk_disable() API functions are allowed in
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atomic context.
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For clk_is_enabled() API, it is also designed to be allowed to be used in
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atomic context. However, it doesn't really make any sense to hold the enable
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lock in core, unless you want to do something else with the information of
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the enable state with that lock held. Otherwise, seeing if a clk is enabled is
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a one-shot read of the enabled state, which could just as easily change after
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the function returns because the lock is released. Thus the user of this API
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needs to handle synchronizing the read of the state with whatever they're
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using it for to make sure that the enable state doesn't change during that
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time.
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The prepare lock is a mutex and is held across calls to all other operations.
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All those operations are allowed to sleep, and calls to the corresponding API
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functions are not allowed in atomic context.
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This effectively divides operations in two groups from a locking perspective.
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Drivers don't need to manually protect resources shared between the operations
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of one group, regardless of whether those resources are shared by multiple
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clocks or not. However, access to resources that are shared between operations
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of the two groups needs to be protected by the drivers. An example of such a
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resource would be a register that controls both the clock rate and the clock
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enable/disable state.
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The clock framework is reentrant, in that a driver is allowed to call clock
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framework functions from within its implementation of clock operations. This
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can for instance cause a .set_rate operation of one clock being called from
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within the .set_rate operation of another clock. This case must be considered
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in the driver implementations, but the code flow is usually controlled by the
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driver in that case.
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Note that locking must also be considered when code outside of the common
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clock framework needs to access resources used by the clock operations. This
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is considered out of scope of this document.
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