63 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			63 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| # Copyright (C) Sunplus Co., Ltd. 2021
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: Sunplus SP7021 SoC Interrupt Controller
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| 
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| maintainers:
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|   - Qin Jian <qinjian@cqplus1.com>
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| 
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| properties:
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|   compatible:
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|     items:
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|       - const: sunplus,sp7021-intc
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| 
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|   reg:
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|     maxItems: 2
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|     description:
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|       Specifies base physical address(s) and size of the controller regs.
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|       The 1st region include type/polarity/priority/mask regs.
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|       The 2nd region include clear/masked_ext0/masked_ext1/group regs.
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| 
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|   interrupt-controller: true
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| 
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|   "#interrupt-cells":
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|     const: 2
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|     description:
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|       The first cell is the IRQ number, the second cell is the trigger
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|       type as defined in interrupt.txt in this directory.
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| 
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|   interrupts:
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|     maxItems: 2
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|     description:
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|       EXT_INT0 & EXT_INT1, 2 interrupts references to primary interrupt
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|       controller.
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| 
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| required:
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|   - compatible
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|   - reg
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|   - interrupt-controller
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|   - "#interrupt-cells"
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|   - interrupts
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     #include <dt-bindings/interrupt-controller/arm-gic.h>
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| 
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|     intc: interrupt-controller@9c000780 {
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|         compatible = "sunplus,sp7021-intc";
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|         reg = <0x9c000780 0x80>, <0x9c000a80 0x80>;
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|         interrupt-controller;
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|         #interrupt-cells = <2>;
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|         interrupt-parent = <&gic>;
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|         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, /* EXT_INT0 */
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|                      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; /* EXT_INT1 */
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|     };    
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| 
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| ...
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