52 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			52 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: Loongson-1 Interrupt Controller
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| 
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| maintainers:
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|   - Keguang Zhang <keguang.zhang@gmail.com>
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| 
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| description:
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|   Loongson-1 interrupt controller is connected to the MIPS core interrupt
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|   controller, which controls several groups of interrupts.
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| 
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| properties:
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|   compatible:
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|     const: loongson,ls1x-intc
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| 
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|   reg:
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|     maxItems: 1
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| 
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|   interrupt-controller: true
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| 
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|   '#interrupt-cells':
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|     const: 2
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| 
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|   interrupts:
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|     maxItems: 1
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| 
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| required:
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|   - compatible
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|   - reg
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|   - interrupt-controller
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|   - '#interrupt-cells'
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|   - interrupts
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     intc0: interrupt-controller@1fd01040 {
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|         compatible = "loongson,ls1x-intc";
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|         reg = <0x1fd01040 0x18>;
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| 
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|         interrupt-controller;
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|         #interrupt-cells = <2>;
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| 
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|         interrupt-parent = <&cpu_intc>;
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|         interrupts = <2>;
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|     };    
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