121 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			121 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Driver for Silicon Labs SI2165 DVB-C/-T Demodulator
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|  *
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|  * Copyright (C) 2013-2017 Matthias Schwarzott <zzam@gentoo.org>
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|  *
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|  *   This program is free software; you can redistribute it and/or modify
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|  *   it under the terms of the GNU General Public License as published by
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|  *   the Free Software Foundation; either version 2 of the License, or
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|  *   (at your option) any later version.
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|  *
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|  *   This program is distributed in the hope that it will be useful,
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|  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *   GNU General Public License for more details.
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|  *
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|  */
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| 
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| #ifndef _DVB_SI2165_PRIV
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| #define _DVB_SI2165_PRIV
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| 
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| #define SI2165_FIRMWARE_REV_D "dvb-demod-si2165.fw"
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| 
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| struct si2165_config {
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| 	/* i2c addr
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| 	 * possible values: 0x64,0x65,0x66,0x67
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| 	 */
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| 	u8 i2c_addr;
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| 
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| 	/* external clock or XTAL */
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| 	u8 chip_mode;
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| 
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| 	/* frequency of external clock or xtal in Hz
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| 	 * possible values: 4000000, 16000000, 20000000, 240000000, 27000000
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| 	 */
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| 	u32 ref_freq_hz;
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| 
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| 	/* invert the spectrum */
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| 	bool inversion;
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| };
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| 
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| #define STATISTICS_PERIOD_PKT_COUNT	30000u
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| #define STATISTICS_PERIOD_BIT_COUNT	(STATISTICS_PERIOD_PKT_COUNT * 204 * 8)
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| 
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| #define REG_CHIP_MODE			0x0000
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| #define REG_CHIP_REVCODE		0x0023
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| #define REV_CHIP_TYPE			0x0118
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| #define REG_CHIP_INIT			0x0050
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| #define REG_INIT_DONE			0x0054
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| #define REG_START_INIT			0x0096
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| #define REG_PLL_DIVL			0x00a0
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| #define REG_RST_ALL			0x00c0
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| #define REG_LOCK_TIMEOUT		0x00c4
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| #define REG_AUTO_RESET			0x00cb
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| #define REG_OVERSAMP			0x00e4
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| #define REG_IF_FREQ_SHIFT		0x00e8
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| #define REG_DVB_STANDARD		0x00ec
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| #define REG_DSP_CLOCK			0x0104
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| #define REG_ADC_RI8			0x0123
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| #define REG_ADC_RI1			0x012a
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| #define REG_ADC_RI2			0x012b
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| #define REG_ADC_RI3			0x012c
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| #define REG_ADC_RI4			0x012d
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| #define REG_ADC_RI5			0x012e
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| #define REG_ADC_RI6			0x012f
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| #define REG_AGC_CRESTF_DBX8		0x0150
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| #define REG_AGC_UNFREEZE_THR		0x015b
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| #define REG_AGC2_MIN			0x016e
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| #define REG_AGC2_KACQ			0x016c
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| #define REG_AGC2_KLOC			0x016d
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| #define REG_AGC2_OUTPUT			0x0170
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| #define REG_AGC2_CLKDIV			0x0171
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| #define REG_AGC_IF_TRI			0x018b
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| #define REG_AGC_IF_SLR			0x0190
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| #define REG_AAF_CRESTF_DBX8		0x01a0
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| #define REG_ACI_CRESTF_DBX8		0x01c8
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| #define REG_SWEEP_STEP			0x0232
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| #define REG_KP_LOCK			0x023a
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| #define REG_UNKNOWN_24C			0x024c
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| #define REG_CENTRAL_TAP			0x0261
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| #define REG_C_N				0x026c
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| #define REG_EQ_AUTO_CONTROL		0x0278
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| #define REG_UNKNOWN_27C			0x027c
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| #define REG_START_SYNCHRO		0x02e0
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| #define REG_REQ_CONSTELLATION		0x02f4
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| #define REG_T_BANDWIDTH			0x0308
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| #define REG_FREQ_SYNC_RANGE		0x030c
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| #define REG_IMPULSIVE_NOISE_REM		0x031c
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| #define REG_WDOG_AND_BOOT		0x0341
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| #define REG_PATCH_VERSION		0x0344
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| #define REG_ADDR_JUMP			0x0348
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| #define REG_UNKNOWN_350			0x0350
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| #define REG_EN_RST_ERROR		0x035c
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| #define REG_DCOM_CONTROL_BYTE		0x0364
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| #define REG_DCOM_ADDR			0x0368
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| #define REG_DCOM_DATA			0x036c
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| #define REG_RST_CRC			0x0379
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| #define REG_GP_REG0_LSB			0x0384
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| #define REG_GP_REG0_MSB			0x0387
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| #define REG_CRC				0x037a
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| #define REG_CHECK_SIGNAL		0x03a8
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| #define REG_CBER_RST			0x0424
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| #define REG_CBER_BIT			0x0428
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| #define REG_CBER_ERR			0x0430
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| #define REG_CBER_AVAIL			0x0434
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| #define REG_PS_LOCK			0x0440
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| #define REG_UNCOR_CNT			0x0468
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| #define REG_BER_RST			0x046c
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| #define REG_BER_PKT			0x0470
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| #define REG_BER_BIT			0x0478
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| #define REG_BER_AVAIL			0x047c
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| #define REG_FEC_LOCK			0x04e0
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| #define REG_TS_DATA_MODE		0x04e4
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| #define REG_TS_CLK_MODE			0x04e5
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| #define REG_TS_TRI			0x04ef
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| #define REG_TS_SLR			0x04f4
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| #define REG_RSSI_ENABLE			0x0641
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| #define REG_RSSI_PAD_CTRL		0x0646
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| #define REG_TS_PARALLEL_MODE		0x08f8
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| 
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| #endif /* _DVB_SI2165_PRIV */
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