92 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			92 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| #include <asm/trap_pf.h>
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| #include <asm/segment.h>
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| #include <asm/trapnr.h>
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| #include "misc.h"
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| 
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| static void set_idt_entry(int vector, void (*handler)(void))
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| {
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| 	unsigned long address = (unsigned long)handler;
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| 	gate_desc entry;
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| 
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| 	memset(&entry, 0, sizeof(entry));
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| 
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| 	entry.offset_low    = (u16)(address & 0xffff);
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| 	entry.segment       = __KERNEL_CS;
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| 	entry.bits.type     = GATE_TRAP;
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| 	entry.bits.p        = 1;
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| 	entry.offset_middle = (u16)((address >> 16) & 0xffff);
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| 	entry.offset_high   = (u32)(address >> 32);
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| 
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| 	memcpy(&boot_idt[vector], &entry, sizeof(entry));
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| }
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| 
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| /* Have this here so we don't need to include <asm/desc.h> */
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| static void load_boot_idt(const struct desc_ptr *dtr)
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| {
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| 	asm volatile("lidt %0"::"m" (*dtr));
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| }
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| 
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| /* Setup IDT before kernel jumping to  .Lrelocated */
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| void load_stage1_idt(void)
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| {
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| 	boot_idt_desc.address = (unsigned long)boot_idt;
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| 
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| 
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| 	if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
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| 		set_idt_entry(X86_TRAP_VC, boot_stage1_vc);
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| 
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| 	load_boot_idt(&boot_idt_desc);
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| }
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| 
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| /*
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|  * Setup IDT after kernel jumping to  .Lrelocated.
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|  *
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|  * initialize_identity_maps() needs a #PF handler to be setup
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|  * in order to be able to fault-in identity mapping ranges; see
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|  * do_boot_page_fault().
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|  *
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|  * This #PF handler setup needs to happen in load_stage2_idt() where the
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|  * IDT is loaded and there the #VC IDT entry gets setup too.
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|  *
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|  * In order to be able to handle #VCs, one needs a GHCB which
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|  * gets setup with an already set up pagetable, which is done in
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|  * initialize_identity_maps(). And there's the catch 22: the boot #VC
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|  * handler do_boot_stage2_vc() needs to call early_setup_ghcb() itself
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|  * (and, especially set_page_decrypted()) because the SEV-ES setup code
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|  * cannot initialize a GHCB as there's no #PF handler yet...
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|  */
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| void load_stage2_idt(void)
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| {
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| 	boot_idt_desc.address = (unsigned long)boot_idt;
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| 
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| 	set_idt_entry(X86_TRAP_PF, boot_page_fault);
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| 
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| #ifdef CONFIG_AMD_MEM_ENCRYPT
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| 	/*
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| 	 * Clear the second stage #VC handler in case guest types
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| 	 * needing #VC have not been detected.
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| 	 */
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| 	if (sev_status & BIT(1))
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| 		set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
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| 	else
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| 		set_idt_entry(X86_TRAP_VC, NULL);
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| #endif
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| 
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| 	load_boot_idt(&boot_idt_desc);
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| }
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| 
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| void cleanup_exception_handling(void)
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| {
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| 	/*
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| 	 * Flush GHCB from cache and map it encrypted again when running as
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| 	 * SEV-ES guest.
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| 	 */
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| 	sev_es_shutdown_ghcb();
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| 
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| 	/* Set a null-idt, disabling #PF and #VC handling */
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| 	boot_idt_desc.size    = 0;
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| 	boot_idt_desc.address = 0;
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| 	load_boot_idt(&boot_idt_desc);
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| }
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