69 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * This file is subject to the terms and conditions of the GNU General Public
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 * License.  See the file "COPYING" in the main directory of this archive
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 * for more details.
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 *
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 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
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 */
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#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
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#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
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/*
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 * SN pci asic types.  Do not ever renumber these or reuse values.  The
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 * values must agree with what prom thinks they are.
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 */
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#define PCIIO_ASIC_TYPE_UNKNOWN	0
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#define PCIIO_ASIC_TYPE_PPB	1
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#define PCIIO_ASIC_TYPE_PIC	2
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#define PCIIO_ASIC_TYPE_TIOCP	3
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#define PCIIO_ASIC_TYPE_TIOCA	4
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#define PCIIO_ASIC_TYPE_TIOCE	5
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#define PCIIO_ASIC_MAX_TYPES	6
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/*
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 * Common pciio bus provider data.  There should be one of these as the
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 * first field in any pciio based provider soft structure (e.g. pcibr_soft
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 * tioca_soft, etc).
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 */
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struct pcibus_bussoft {
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	u32		bs_asic_type;	/* chipset type */
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	u32		bs_xid;		/* xwidget id */
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	u32		bs_persist_busnum; /* Persistent Bus Number */
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	u32		bs_persist_segment; /* Segment Number */
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	u64		bs_legacy_io;	/* legacy io pio addr */
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	u64		bs_legacy_mem;	/* legacy mem pio addr */
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	u64		bs_base;	/* widget base */
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	struct xwidget_info	*bs_xwidget_info;
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};
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struct pci_controller;
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/*
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 * SN pci bus indirection
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 */
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struct sn_pcibus_provider {
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	dma_addr_t	(*dma_map)(struct pci_dev *, unsigned long, size_t, int flags);
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	dma_addr_t	(*dma_map_consistent)(struct pci_dev *, unsigned long, size_t, int flags);
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	void		(*dma_unmap)(struct pci_dev *, dma_addr_t, int);
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	void *		(*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *);
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 	void		(*force_interrupt)(struct sn_irq_info *);
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 	void		(*target_interrupt)(struct sn_irq_info *);
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};
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/*
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 * Flags used by the map interfaces
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 * bits 3:0 specifies format of passed in address
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 * bit  4   specifies that address is to be used for MSI
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 */
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#define SN_DMA_ADDRTYPE(x)	((x) & 0xf)
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#define     SN_DMA_ADDR_PHYS	1	/* address is an xio address. */
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#define     SN_DMA_ADDR_XIO	2	/* address is phys memory */
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#define SN_DMA_MSI		0x10	/* Bus address is to be used for MSI */
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extern struct sn_pcibus_provider *sn_pci_provider[];
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#endif				/* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */
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