713 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			713 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * Thunderbolt driver - eeprom access
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|  *
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|  * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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|  * Copyright (C) 2018, Intel Corporation
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|  */
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| 
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| #include <linux/crc32.h>
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| #include <linux/delay.h>
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| #include <linux/property.h>
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| #include <linux/slab.h>
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| #include "tb.h"
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| 
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| /*
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|  * tb_eeprom_ctl_write() - write control word
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|  */
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| static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
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| {
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| 	return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1);
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| }
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| 
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| /*
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|  * tb_eeprom_ctl_write() - read control word
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|  */
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| static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
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| {
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| 	return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + ROUTER_CS_4, 1);
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| }
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| 
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| enum tb_eeprom_transfer {
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| 	TB_EEPROM_IN,
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| 	TB_EEPROM_OUT,
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| };
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| 
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| /*
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|  * tb_eeprom_active - enable rom access
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|  *
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|  * WARNING: Always disable access after usage. Otherwise the controller will
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|  * fail to reprobe.
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|  */
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| static int tb_eeprom_active(struct tb_switch *sw, bool enable)
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| {
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| 	struct tb_eeprom_ctl ctl;
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| 	int res = tb_eeprom_ctl_read(sw, &ctl);
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| 	if (res)
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| 		return res;
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| 	if (enable) {
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| 		ctl.bit_banging_enable = 1;
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| 		res = tb_eeprom_ctl_write(sw, &ctl);
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| 		if (res)
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| 			return res;
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| 		ctl.fl_cs = 0;
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| 		return tb_eeprom_ctl_write(sw, &ctl);
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| 	} else {
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| 		ctl.fl_cs = 1;
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| 		res = tb_eeprom_ctl_write(sw, &ctl);
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| 		if (res)
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| 			return res;
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| 		ctl.bit_banging_enable = 0;
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| 		return tb_eeprom_ctl_write(sw, &ctl);
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| 	}
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| }
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| 
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| /*
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|  * tb_eeprom_transfer - transfer one bit
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|  *
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|  * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->fl_do.
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|  * If TB_EEPROM_OUT is passed, then ctl->fl_di will be written.
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|  */
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| static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
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| 			      enum tb_eeprom_transfer direction)
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| {
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| 	int res;
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| 	if (direction == TB_EEPROM_OUT) {
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| 		res = tb_eeprom_ctl_write(sw, ctl);
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| 		if (res)
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| 			return res;
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| 	}
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| 	ctl->fl_sk = 1;
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| 	res = tb_eeprom_ctl_write(sw, ctl);
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| 	if (res)
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| 		return res;
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| 	if (direction == TB_EEPROM_IN) {
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| 		res = tb_eeprom_ctl_read(sw, ctl);
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| 		if (res)
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| 			return res;
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| 	}
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| 	ctl->fl_sk = 0;
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| 	return tb_eeprom_ctl_write(sw, ctl);
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| }
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| 
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| /*
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|  * tb_eeprom_out - write one byte to the bus
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|  */
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| static int tb_eeprom_out(struct tb_switch *sw, u8 val)
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| {
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| 	struct tb_eeprom_ctl ctl;
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| 	int i;
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| 	int res = tb_eeprom_ctl_read(sw, &ctl);
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| 	if (res)
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| 		return res;
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| 	for (i = 0; i < 8; i++) {
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| 		ctl.fl_di = val & 0x80;
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| 		res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT);
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| 		if (res)
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| 			return res;
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| 		val <<= 1;
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| 	}
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| 	return 0;
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| }
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| 
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| /*
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|  * tb_eeprom_in - read one byte from the bus
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|  */
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| static int tb_eeprom_in(struct tb_switch *sw, u8 *val)
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| {
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| 	struct tb_eeprom_ctl ctl;
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| 	int i;
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| 	int res = tb_eeprom_ctl_read(sw, &ctl);
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| 	if (res)
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| 		return res;
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| 	*val = 0;
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| 	for (i = 0; i < 8; i++) {
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| 		*val <<= 1;
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| 		res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN);
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| 		if (res)
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| 			return res;
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| 		*val |= ctl.fl_do;
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| 	}
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| 	return 0;
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| }
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| 
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| /*
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|  * tb_eeprom_get_drom_offset - get drom offset within eeprom
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|  */
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| static int tb_eeprom_get_drom_offset(struct tb_switch *sw, u16 *offset)
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| {
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| 	struct tb_cap_plug_events cap;
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| 	int res;
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| 
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| 	if (!sw->cap_plug_events) {
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| 		tb_sw_warn(sw, "no TB_CAP_PLUG_EVENTS, cannot read eeprom\n");
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| 		return -ENODEV;
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| 	}
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| 	res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events,
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| 			     sizeof(cap) / 4);
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| 	if (res)
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| 		return res;
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| 
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| 	if (!cap.eeprom_ctl.present || cap.eeprom_ctl.not_present) {
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| 		tb_sw_warn(sw, "no NVM\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	if (cap.drom_offset > 0xffff) {
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| 		tb_sw_warn(sw, "drom offset is larger than 0xffff: %#x\n",
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| 				cap.drom_offset);
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| 		return -ENXIO;
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| 	}
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| 	*offset = cap.drom_offset;
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| 	return 0;
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| }
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| 
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| /*
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|  * tb_eeprom_read_n - read count bytes from offset into val
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|  */
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| static int tb_eeprom_read_n(struct tb_switch *sw, u16 offset, u8 *val,
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| 		size_t count)
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| {
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| 	u16 drom_offset;
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| 	int i, res;
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| 
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| 	res = tb_eeprom_get_drom_offset(sw, &drom_offset);
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| 	if (res)
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| 		return res;
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| 
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| 	offset += drom_offset;
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| 
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| 	res = tb_eeprom_active(sw, true);
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| 	if (res)
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| 		return res;
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| 	res = tb_eeprom_out(sw, 3);
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| 	if (res)
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| 		return res;
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| 	res = tb_eeprom_out(sw, offset >> 8);
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| 	if (res)
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| 		return res;
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| 	res = tb_eeprom_out(sw, offset);
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| 	if (res)
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| 		return res;
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| 	for (i = 0; i < count; i++) {
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| 		res = tb_eeprom_in(sw, val + i);
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| 		if (res)
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| 			return res;
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| 	}
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| 	return tb_eeprom_active(sw, false);
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| }
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| 
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| static u8 tb_crc8(u8 *data, int len)
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| {
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| 	int i, j;
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| 	u8 val = 0xff;
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| 	for (i = 0; i < len; i++) {
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| 		val ^= data[i];
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| 		for (j = 0; j < 8; j++)
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| 			val = (val << 1) ^ ((val & 0x80) ? 7 : 0);
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| 	}
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| 	return val;
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| }
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| 
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| static u32 tb_crc32(void *data, size_t len)
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| {
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| 	return ~__crc32c_le(~0, data, len);
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| }
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| 
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| #define TB_DROM_DATA_START		13
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| #define TB_DROM_HEADER_SIZE		22
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| #define USB4_DROM_HEADER_SIZE		16
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| 
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| struct tb_drom_header {
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| 	/* BYTE 0 */
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| 	u8 uid_crc8; /* checksum for uid */
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| 	/* BYTES 1-8 */
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| 	u64 uid;
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| 	/* BYTES 9-12 */
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| 	u32 data_crc32; /* checksum for data_len bytes starting at byte 13 */
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| 	/* BYTE 13 */
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| 	u8 device_rom_revision; /* should be <= 1 */
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| 	u16 data_len:12;
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| 	u8 reserved:4;
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| 	/* BYTES 16-21 - Only for TBT DROM, nonexistent in USB4 DROM */
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| 	u16 vendor_id;
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| 	u16 model_id;
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| 	u8 model_rev;
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| 	u8 eeprom_rev;
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| } __packed;
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| 
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| enum tb_drom_entry_type {
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| 	/* force unsigned to prevent "one-bit signed bitfield" warning */
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| 	TB_DROM_ENTRY_GENERIC = 0U,
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| 	TB_DROM_ENTRY_PORT,
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| };
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| 
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| struct tb_drom_entry_header {
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| 	u8 len;
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| 	u8 index:6;
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| 	bool port_disabled:1; /* only valid if type is TB_DROM_ENTRY_PORT */
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| 	enum tb_drom_entry_type type:1;
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| } __packed;
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| 
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| struct tb_drom_entry_generic {
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| 	struct tb_drom_entry_header header;
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| 	u8 data[];
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| } __packed;
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| 
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| struct tb_drom_entry_port {
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| 	/* BYTES 0-1 */
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| 	struct tb_drom_entry_header header;
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| 	/* BYTE 2 */
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| 	u8 dual_link_port_rid:4;
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| 	u8 link_nr:1;
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| 	u8 unknown1:2;
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| 	bool has_dual_link_port:1;
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| 
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| 	/* BYTE 3 */
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| 	u8 dual_link_port_nr:6;
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| 	u8 unknown2:2;
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| 
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| 	/* BYTES 4 - 5 TODO decode */
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| 	u8 micro2:4;
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| 	u8 micro1:4;
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| 	u8 micro3;
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| 
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| 	/* BYTES 6-7, TODO: verify (find hardware that has these set) */
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| 	u8 peer_port_rid:4;
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| 	u8 unknown3:3;
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| 	bool has_peer_port:1;
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| 	u8 peer_port_nr:6;
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| 	u8 unknown4:2;
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| } __packed;
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| 
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| /* USB4 product descriptor */
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| struct tb_drom_entry_desc {
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| 	struct tb_drom_entry_header header;
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| 	u16 bcdUSBSpec;
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| 	u16 idVendor;
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| 	u16 idProduct;
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| 	u16 bcdProductFWRevision;
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| 	u32 TID;
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| 	u8 productHWRevision;
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| };
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| 
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| /**
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|  * tb_drom_read_uid_only() - Read UID directly from DROM
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|  * @sw: Router whose UID to read
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|  * @uid: UID is placed here
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|  *
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|  * Does not use the cached copy in sw->drom. Used during resume to check switch
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|  * identity.
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|  */
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| int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid)
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| {
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| 	u8 data[9];
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| 	u8 crc;
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| 	int res;
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| 
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| 	/* read uid */
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| 	res = tb_eeprom_read_n(sw, 0, data, 9);
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| 	if (res)
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| 		return res;
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| 
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| 	crc = tb_crc8(data + 1, 8);
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| 	if (crc != data[0]) {
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| 		tb_sw_warn(sw, "uid crc8 mismatch (expected: %#x, got: %#x)\n",
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| 				data[0], crc);
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| 		return -EIO;
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| 	}
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| 
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| 	*uid = *(u64 *)(data+1);
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| 	return 0;
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| }
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| 
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| static int tb_drom_parse_entry_generic(struct tb_switch *sw,
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| 		struct tb_drom_entry_header *header)
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| {
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| 	const struct tb_drom_entry_generic *entry =
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| 		(const struct tb_drom_entry_generic *)header;
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| 
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| 	switch (header->index) {
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| 	case 1:
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| 		/* Length includes 2 bytes header so remove it before copy */
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| 		sw->vendor_name = kstrndup(entry->data,
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| 			header->len - sizeof(*header), GFP_KERNEL);
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| 		if (!sw->vendor_name)
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| 			return -ENOMEM;
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| 		break;
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| 
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| 	case 2:
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| 		sw->device_name = kstrndup(entry->data,
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| 			header->len - sizeof(*header), GFP_KERNEL);
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| 		if (!sw->device_name)
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| 			return -ENOMEM;
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| 		break;
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| 	case 9: {
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| 		const struct tb_drom_entry_desc *desc =
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| 			(const struct tb_drom_entry_desc *)entry;
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| 
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| 		if (!sw->vendor && !sw->device) {
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| 			sw->vendor = desc->idVendor;
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| 			sw->device = desc->idProduct;
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| 		}
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| 		break;
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| 	}
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int tb_drom_parse_entry_port(struct tb_switch *sw,
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| 				    struct tb_drom_entry_header *header)
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| {
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| 	struct tb_port *port;
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| 	int res;
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| 	enum tb_port_type type;
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| 
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| 	/*
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| 	 * Some DROMs list more ports than the controller actually has
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| 	 * so we skip those but allow the parser to continue.
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| 	 */
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| 	if (header->index > sw->config.max_port_number) {
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| 		dev_info_once(&sw->dev, "ignoring unnecessary extra entries in DROM\n");
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| 		return 0;
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| 	}
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| 
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| 	port = &sw->ports[header->index];
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| 	port->disabled = header->port_disabled;
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| 	if (port->disabled)
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| 		return 0;
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| 
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| 	res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1);
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| 	if (res)
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| 		return res;
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| 	type &= 0xffffff;
 | |
| 
 | |
| 	if (type == TB_TYPE_PORT) {
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| 		struct tb_drom_entry_port *entry = (void *) header;
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| 		if (header->len != sizeof(*entry)) {
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| 			tb_sw_warn(sw,
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| 				"port entry has size %#x (expected %#zx)\n",
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| 				header->len, sizeof(struct tb_drom_entry_port));
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| 			return -EIO;
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| 		}
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| 		port->link_nr = entry->link_nr;
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| 		if (entry->has_dual_link_port)
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| 			port->dual_link_port =
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| 				&port->sw->ports[entry->dual_link_port_nr];
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| 	}
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| 	return 0;
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| }
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| 
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| /*
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|  * tb_drom_parse_entries - parse the linked list of drom entries
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|  *
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|  * Drom must have been copied to sw->drom.
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|  */
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| static int tb_drom_parse_entries(struct tb_switch *sw, size_t header_size)
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| {
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| 	struct tb_drom_header *header = (void *) sw->drom;
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| 	u16 pos = header_size;
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| 	u16 drom_size = header->data_len + TB_DROM_DATA_START;
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| 	int res;
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| 
 | |
| 	while (pos < drom_size) {
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| 		struct tb_drom_entry_header *entry = (void *) (sw->drom + pos);
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| 		if (pos + 1 == drom_size || pos + entry->len > drom_size
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| 				|| !entry->len) {
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| 			tb_sw_warn(sw, "DROM buffer overrun\n");
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| 			return -EIO;
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| 		}
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| 
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| 		switch (entry->type) {
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| 		case TB_DROM_ENTRY_GENERIC:
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| 			res = tb_drom_parse_entry_generic(sw, entry);
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| 			break;
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| 		case TB_DROM_ENTRY_PORT:
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| 			res = tb_drom_parse_entry_port(sw, entry);
 | |
| 			break;
 | |
| 		}
 | |
| 		if (res)
 | |
| 			return res;
 | |
| 
 | |
| 		pos += entry->len;
 | |
| 	}
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| 	return 0;
 | |
| }
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| 
 | |
| /*
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|  * tb_drom_copy_efi - copy drom supplied by EFI to sw->drom if present
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|  */
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| static int tb_drom_copy_efi(struct tb_switch *sw, u16 *size)
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| {
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| 	struct device *dev = &sw->tb->nhi->pdev->dev;
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| 	int len, res;
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| 
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| 	len = device_property_count_u8(dev, "ThunderboltDROM");
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| 	if (len < 0 || len < sizeof(struct tb_drom_header))
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| 		return -EINVAL;
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| 
 | |
| 	sw->drom = kmalloc(len, GFP_KERNEL);
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| 	if (!sw->drom)
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| 		return -ENOMEM;
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| 
 | |
| 	res = device_property_read_u8_array(dev, "ThunderboltDROM", sw->drom,
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| 									len);
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| 	if (res)
 | |
| 		goto err;
 | |
| 
 | |
| 	*size = ((struct tb_drom_header *)sw->drom)->data_len +
 | |
| 							  TB_DROM_DATA_START;
 | |
| 	if (*size > len)
 | |
| 		goto err;
 | |
| 
 | |
| 	return 0;
 | |
| 
 | |
| err:
 | |
| 	kfree(sw->drom);
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| 	sw->drom = NULL;
 | |
| 	return -EINVAL;
 | |
| }
 | |
| 
 | |
| static int tb_drom_copy_nvm(struct tb_switch *sw, u16 *size)
 | |
| {
 | |
| 	u16 drom_offset;
 | |
| 	int ret;
 | |
| 
 | |
| 	if (!sw->dma_port)
 | |
| 		return -ENODEV;
 | |
| 
 | |
| 	ret = tb_eeprom_get_drom_offset(sw, &drom_offset);
 | |
| 	if (ret)
 | |
| 		return ret;
 | |
| 
 | |
| 	if (!drom_offset)
 | |
| 		return -ENODEV;
 | |
| 
 | |
| 	ret = dma_port_flash_read(sw->dma_port, drom_offset + 14, size,
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| 				  sizeof(*size));
 | |
| 	if (ret)
 | |
| 		return ret;
 | |
| 
 | |
| 	/* Size includes CRC8 + UID + CRC32 */
 | |
| 	*size += 1 + 8 + 4;
 | |
| 	sw->drom = kzalloc(*size, GFP_KERNEL);
 | |
| 	if (!sw->drom)
 | |
| 		return -ENOMEM;
 | |
| 
 | |
| 	ret = dma_port_flash_read(sw->dma_port, drom_offset, sw->drom, *size);
 | |
| 	if (ret)
 | |
| 		goto err_free;
 | |
| 
 | |
| 	/*
 | |
| 	 * Read UID from the minimal DROM because the one in NVM is just
 | |
| 	 * a placeholder.
 | |
| 	 */
 | |
| 	tb_drom_read_uid_only(sw, &sw->uid);
 | |
| 	return 0;
 | |
| 
 | |
| err_free:
 | |
| 	kfree(sw->drom);
 | |
| 	sw->drom = NULL;
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static int usb4_copy_drom(struct tb_switch *sw, u16 *size)
 | |
| {
 | |
| 	int ret;
 | |
| 
 | |
| 	ret = usb4_switch_drom_read(sw, 14, size, sizeof(*size));
 | |
| 	if (ret)
 | |
| 		return ret;
 | |
| 
 | |
| 	/* Size includes CRC8 + UID + CRC32 */
 | |
| 	*size += 1 + 8 + 4;
 | |
| 	sw->drom = kzalloc(*size, GFP_KERNEL);
 | |
| 	if (!sw->drom)
 | |
| 		return -ENOMEM;
 | |
| 
 | |
| 	ret = usb4_switch_drom_read(sw, 0, sw->drom, *size);
 | |
| 	if (ret) {
 | |
| 		kfree(sw->drom);
 | |
| 		sw->drom = NULL;
 | |
| 	}
 | |
| 
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static int tb_drom_bit_bang(struct tb_switch *sw, u16 *size)
 | |
| {
 | |
| 	int ret;
 | |
| 
 | |
| 	ret = tb_eeprom_read_n(sw, 14, (u8 *)size, 2);
 | |
| 	if (ret)
 | |
| 		return ret;
 | |
| 
 | |
| 	*size &= 0x3ff;
 | |
| 	*size += TB_DROM_DATA_START;
 | |
| 
 | |
| 	tb_sw_dbg(sw, "reading DROM (length: %#x)\n", *size);
 | |
| 	if (*size < sizeof(struct tb_drom_header)) {
 | |
| 		tb_sw_warn(sw, "DROM too small, aborting\n");
 | |
| 		return -EIO;
 | |
| 	}
 | |
| 
 | |
| 	sw->drom = kzalloc(*size, GFP_KERNEL);
 | |
| 	if (!sw->drom)
 | |
| 		return -ENOMEM;
 | |
| 
 | |
| 	ret = tb_eeprom_read_n(sw, 0, sw->drom, *size);
 | |
| 	if (ret)
 | |
| 		goto err;
 | |
| 
 | |
| 	return 0;
 | |
| 
 | |
| err:
 | |
| 	kfree(sw->drom);
 | |
| 	sw->drom = NULL;
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static int tb_drom_parse_v1(struct tb_switch *sw)
 | |
| {
 | |
| 	const struct tb_drom_header *header =
 | |
| 		(const struct tb_drom_header *)sw->drom;
 | |
| 	u32 crc;
 | |
| 
 | |
| 	crc = tb_crc8((u8 *) &header->uid, 8);
 | |
| 	if (crc != header->uid_crc8) {
 | |
| 		tb_sw_warn(sw,
 | |
| 			"DROM UID CRC8 mismatch (expected: %#x, got: %#x)\n",
 | |
| 			header->uid_crc8, crc);
 | |
| 		return -EIO;
 | |
| 	}
 | |
| 	if (!sw->uid)
 | |
| 		sw->uid = header->uid;
 | |
| 	sw->vendor = header->vendor_id;
 | |
| 	sw->device = header->model_id;
 | |
| 
 | |
| 	crc = tb_crc32(sw->drom + TB_DROM_DATA_START, header->data_len);
 | |
| 	if (crc != header->data_crc32) {
 | |
| 		tb_sw_warn(sw,
 | |
| 			"DROM data CRC32 mismatch (expected: %#x, got: %#x), continuing\n",
 | |
| 			header->data_crc32, crc);
 | |
| 	}
 | |
| 
 | |
| 	return tb_drom_parse_entries(sw, TB_DROM_HEADER_SIZE);
 | |
| }
 | |
| 
 | |
| static int usb4_drom_parse(struct tb_switch *sw)
 | |
| {
 | |
| 	const struct tb_drom_header *header =
 | |
| 		(const struct tb_drom_header *)sw->drom;
 | |
| 	u32 crc;
 | |
| 
 | |
| 	crc = tb_crc32(sw->drom + TB_DROM_DATA_START, header->data_len);
 | |
| 	if (crc != header->data_crc32) {
 | |
| 		tb_sw_warn(sw,
 | |
| 			   "DROM data CRC32 mismatch (expected: %#x, got: %#x), continuing\n",
 | |
| 			   header->data_crc32, crc);
 | |
| 	}
 | |
| 
 | |
| 	return tb_drom_parse_entries(sw, USB4_DROM_HEADER_SIZE);
 | |
| }
 | |
| 
 | |
| static int tb_drom_parse(struct tb_switch *sw, u16 size)
 | |
| {
 | |
| 	const struct tb_drom_header *header = (const void *)sw->drom;
 | |
| 	int ret;
 | |
| 
 | |
| 	if (header->data_len + TB_DROM_DATA_START != size) {
 | |
| 		tb_sw_warn(sw, "DROM size mismatch\n");
 | |
| 		ret = -EIO;
 | |
| 		goto err;
 | |
| 	}
 | |
| 
 | |
| 	tb_sw_dbg(sw, "DROM version: %d\n", header->device_rom_revision);
 | |
| 
 | |
| 	switch (header->device_rom_revision) {
 | |
| 	case 3:
 | |
| 		ret = usb4_drom_parse(sw);
 | |
| 		break;
 | |
| 	default:
 | |
| 		tb_sw_warn(sw, "DROM device_rom_revision %#x unknown\n",
 | |
| 			   header->device_rom_revision);
 | |
| 		fallthrough;
 | |
| 	case 1:
 | |
| 		ret = tb_drom_parse_v1(sw);
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	if (ret) {
 | |
| 		tb_sw_warn(sw, "parsing DROM failed\n");
 | |
| 		goto err;
 | |
| 	}
 | |
| 
 | |
| 	return 0;
 | |
| 
 | |
| err:
 | |
| 	kfree(sw->drom);
 | |
| 	sw->drom = NULL;
 | |
| 
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static int tb_drom_host_read(struct tb_switch *sw)
 | |
| {
 | |
| 	u16 size;
 | |
| 
 | |
| 	if (tb_switch_is_usb4(sw)) {
 | |
| 		usb4_switch_read_uid(sw, &sw->uid);
 | |
| 		if (!usb4_copy_drom(sw, &size))
 | |
| 			return tb_drom_parse(sw, size);
 | |
| 	} else {
 | |
| 		if (!tb_drom_copy_efi(sw, &size))
 | |
| 			return tb_drom_parse(sw, size);
 | |
| 
 | |
| 		if (!tb_drom_copy_nvm(sw, &size))
 | |
| 			return tb_drom_parse(sw, size);
 | |
| 
 | |
| 		tb_drom_read_uid_only(sw, &sw->uid);
 | |
| 	}
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| static int tb_drom_device_read(struct tb_switch *sw)
 | |
| {
 | |
| 	u16 size;
 | |
| 	int ret;
 | |
| 
 | |
| 	if (tb_switch_is_usb4(sw)) {
 | |
| 		usb4_switch_read_uid(sw, &sw->uid);
 | |
| 		ret = usb4_copy_drom(sw, &size);
 | |
| 	} else {
 | |
| 		ret = tb_drom_bit_bang(sw, &size);
 | |
| 	}
 | |
| 
 | |
| 	if (ret)
 | |
| 		return ret;
 | |
| 
 | |
| 	return tb_drom_parse(sw, size);
 | |
| }
 | |
| 
 | |
| /**
 | |
|  * tb_drom_read() - Copy DROM to sw->drom and parse it
 | |
|  * @sw: Router whose DROM to read and parse
 | |
|  *
 | |
|  * This function reads router DROM and if successful parses the entries and
 | |
|  * populates the fields in @sw accordingly. Can be called for any router
 | |
|  * generation.
 | |
|  *
 | |
|  * Returns %0 in case of success and negative errno otherwise.
 | |
|  */
 | |
| int tb_drom_read(struct tb_switch *sw)
 | |
| {
 | |
| 	if (sw->drom)
 | |
| 		return 0;
 | |
| 
 | |
| 	if (!tb_route(sw))
 | |
| 		return tb_drom_host_read(sw);
 | |
| 	return tb_drom_device_read(sw);
 | |
| }
 |