161 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			161 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/platform_device.h>
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| #include <soc/tegra/fuse.h>
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| 
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| #include "soctherm.h"
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| 
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| #define NOMINAL_CALIB_FT			105
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| #define NOMINAL_CALIB_CP			25
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| 
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| #define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK	0x1fff
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| #define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK	(0x1fff << 13)
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| #define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT	13
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| 
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| #define FUSE_TSENSOR_COMMON			0x180
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| 
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| /*
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|  * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON:
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|  *    3                   2                   1                   0
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|  *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  * |       BASE_FT       |      BASE_CP      | SHFT_FT | SHIFT_CP  |
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  *
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|  * Tegra12x, etc:
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|  * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bits,
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|  * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits
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|  * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0].
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|  *
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|  * FUSE_TSENSOR_COMMON:
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|  *    3                   2                   1                   0
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|  *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  * |-----------| SHFT_FT |       BASE_FT       |      BASE_CP      |
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  *
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|  * FUSE_SPARE_REALIGNMENT_REG:
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|  *    3                   2                   1                   0
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|  *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  * |---------------------------------------------------| SHIFT_CP  |
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|  * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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|  */
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| 
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| #define CALIB_COEFFICIENT 1000000LL
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| 
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| /**
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|  * div64_s64_precise() - wrapper for div64_s64()
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|  * @a:  the dividend
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|  * @b:  the divisor
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|  *
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|  * Implements division with fairly accurate rounding instead of truncation by
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|  * shifting the dividend to the left by 16 so that the quotient has a
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|  * much higher precision.
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|  *
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|  * Return: the quotient of a / b.
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|  */
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| static s64 div64_s64_precise(s64 a, s32 b)
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| {
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| 	s64 r, al;
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| 
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| 	/* Scale up for increased precision division */
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| 	al = a << 16;
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| 
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| 	r = div64_s64(al * 2 + 1, 2 * b);
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| 	return r >> 16;
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| }
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| 
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| int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
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| 			    struct tsensor_shared_calib *shared)
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| {
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| 	u32 val;
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| 	s32 shifted_cp, shifted_ft;
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| 	int err;
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| 
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| 	err = tegra_fuse_readl(FUSE_TSENSOR_COMMON, &val);
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| 	if (err)
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| 		return err;
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| 
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| 	shared->base_cp = (val & tfuse->fuse_base_cp_mask) >>
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| 			  tfuse->fuse_base_cp_shift;
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| 	shared->base_ft = (val & tfuse->fuse_base_ft_mask) >>
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| 			  tfuse->fuse_base_ft_shift;
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| 
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| 	shifted_ft = (val & tfuse->fuse_shift_ft_mask) >>
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| 		     tfuse->fuse_shift_ft_shift;
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| 	shifted_ft = sign_extend32(shifted_ft, 4);
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| 
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| 	if (tfuse->fuse_spare_realignment) {
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| 		err = tegra_fuse_readl(tfuse->fuse_spare_realignment, &val);
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| 		if (err)
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| 			return err;
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| 	}
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| 
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| 	shifted_cp = sign_extend32(val, 5);
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| 
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| 	shared->actual_temp_cp = 2 * NOMINAL_CALIB_CP + shifted_cp;
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| 	shared->actual_temp_ft = 2 * NOMINAL_CALIB_FT + shifted_ft;
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| 
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| 	return 0;
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| }
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| 
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| int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
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| 			     const struct tsensor_shared_calib *shared,
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| 			     u32 *calibration)
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| {
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| 	const struct tegra_tsensor_group *sensor_group;
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| 	u32 val, calib;
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| 	s32 actual_tsensor_ft, actual_tsensor_cp;
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| 	s32 delta_sens, delta_temp;
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| 	s32 mult, div;
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| 	s16 therma, thermb;
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| 	s64 temp;
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| 	int err;
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| 
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| 	sensor_group = sensor->group;
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| 
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| 	err = tegra_fuse_readl(sensor->calib_fuse_offset, &val);
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| 	if (err)
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| 		return err;
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| 
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| 	actual_tsensor_cp = (shared->base_cp * 64) + sign_extend32(val, 12);
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| 	val = (val & FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK) >>
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| 	      FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT;
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| 	actual_tsensor_ft = (shared->base_ft * 32) + sign_extend32(val, 12);
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| 
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| 	delta_sens = actual_tsensor_ft - actual_tsensor_cp;
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| 	delta_temp = shared->actual_temp_ft - shared->actual_temp_cp;
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| 
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| 	mult = sensor_group->pdiv * sensor->config->tsample_ate;
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| 	div = sensor->config->tsample * sensor_group->pdiv_ate;
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| 
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| 	temp = (s64)delta_temp * (1LL << 13) * mult;
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| 	therma = div64_s64_precise(temp, (s64)delta_sens * div);
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| 
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| 	temp = ((s64)actual_tsensor_ft * shared->actual_temp_cp) -
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| 		((s64)actual_tsensor_cp * shared->actual_temp_ft);
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| 	thermb = div64_s64_precise(temp, delta_sens);
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| 
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| 	temp = (s64)therma * sensor->fuse_corr_alpha;
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| 	therma = div64_s64_precise(temp, CALIB_COEFFICIENT);
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| 
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| 	temp = (s64)thermb * sensor->fuse_corr_alpha + sensor->fuse_corr_beta;
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| 	thermb = div64_s64_precise(temp, CALIB_COEFFICIENT);
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| 
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| 	calib = ((u16)therma << SENSOR_CONFIG2_THERMA_SHIFT) |
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| 		((u16)thermb << SENSOR_CONFIG2_THERMB_SHIFT);
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| 
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| 	*calibration = calib;
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| 
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| 	return 0;
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| }
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| 
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| MODULE_AUTHOR("Wei Ni <wni@nvidia.com>");
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| MODULE_DESCRIPTION("Tegra SOCTHERM fuse management");
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| MODULE_LICENSE("GPL v2");
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