394 lines
		
	
	
		
			9.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			394 lines
		
	
	
		
			9.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * intel_soc_dts_iosf.c
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|  * Copyright (c) 2015, Intel Corporation.
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|  */
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| 
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| #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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| 
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| #include <linux/bitops.h>
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| #include <linux/intel_tcc.h>
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| #include <linux/module.h>
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| #include <linux/slab.h>
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| #include <linux/interrupt.h>
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| #include <asm/iosf_mbi.h>
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| #include "intel_soc_dts_iosf.h"
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| 
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| #define SOC_DTS_OFFSET_ENABLE		0xB0
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| #define SOC_DTS_OFFSET_TEMP		0xB1
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| 
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| #define SOC_DTS_OFFSET_PTPS		0xB2
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| #define SOC_DTS_OFFSET_PTTS		0xB3
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| #define SOC_DTS_OFFSET_PTTSS		0xB4
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| #define SOC_DTS_OFFSET_PTMC		0x80
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| #define SOC_DTS_TE_AUX0			0xB5
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| #define SOC_DTS_TE_AUX1			0xB6
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| 
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| #define SOC_DTS_AUX0_ENABLE_BIT		BIT(0)
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| #define SOC_DTS_AUX1_ENABLE_BIT		BIT(1)
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| #define SOC_DTS_CPU_MODULE0_ENABLE_BIT	BIT(16)
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| #define SOC_DTS_CPU_MODULE1_ENABLE_BIT	BIT(17)
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| #define SOC_DTS_TE_SCI_ENABLE		BIT(9)
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| #define SOC_DTS_TE_SMI_ENABLE		BIT(10)
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| #define SOC_DTS_TE_MSI_ENABLE		BIT(11)
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| #define SOC_DTS_TE_APICA_ENABLE		BIT(14)
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| #define SOC_DTS_PTMC_APIC_DEASSERT_BIT	BIT(4)
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| 
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| /* DTS encoding for TJ MAX temperature */
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| #define SOC_DTS_TJMAX_ENCODING		0x7F
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| 
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| /* Mask for two trips in status bits */
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| #define SOC_DTS_TRIP_MASK		0x03
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| 
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| static int update_trip_temp(struct intel_soc_dts_sensors *sensors,
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| 			    int thres_index, int temp)
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| {
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| 	int status;
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| 	u32 temp_out;
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| 	u32 out;
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| 	unsigned long update_ptps;
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| 	u32 store_ptps;
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| 	u32 store_ptmc;
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| 	u32 store_te_out;
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| 	u32 te_out;
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| 	u32 int_enable_bit = SOC_DTS_TE_APICA_ENABLE;
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| 
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| 	if (sensors->intr_type == INTEL_SOC_DTS_INTERRUPT_MSI)
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| 		int_enable_bit |= SOC_DTS_TE_MSI_ENABLE;
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| 
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| 	temp_out = (sensors->tj_max - temp) / 1000;
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| 
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_OFFSET_PTPS, &store_ptps);
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| 	if (status)
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| 		return status;
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| 
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| 	update_ptps = store_ptps;
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| 	bitmap_set_value8(&update_ptps, temp_out & 0xFF, thres_index * 8);
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| 	out = update_ptps;
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| 
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| 	status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 				SOC_DTS_OFFSET_PTPS, out);
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| 	if (status)
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| 		return status;
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| 
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| 	pr_debug("update_trip_temp PTPS = %x\n", out);
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_OFFSET_PTMC, &out);
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| 	if (status)
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| 		goto err_restore_ptps;
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| 
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| 	store_ptmc = out;
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| 
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_TE_AUX0 + thres_index,
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| 			       &te_out);
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| 	if (status)
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| 		goto err_restore_ptmc;
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| 
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| 	store_te_out = te_out;
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| 	/* Enable for CPU module 0 and module 1 */
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| 	out |= (SOC_DTS_CPU_MODULE0_ENABLE_BIT |
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| 					SOC_DTS_CPU_MODULE1_ENABLE_BIT);
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| 	if (temp) {
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| 		if (thres_index)
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| 			out |= SOC_DTS_AUX1_ENABLE_BIT;
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| 		else
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| 			out |= SOC_DTS_AUX0_ENABLE_BIT;
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| 		te_out |= int_enable_bit;
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| 	} else {
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| 		if (thres_index)
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| 			out &= ~SOC_DTS_AUX1_ENABLE_BIT;
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| 		else
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| 			out &= ~SOC_DTS_AUX0_ENABLE_BIT;
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| 		te_out &= ~int_enable_bit;
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| 	}
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| 	status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 				SOC_DTS_OFFSET_PTMC, out);
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| 	if (status)
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| 		goto err_restore_te_out;
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| 
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| 	status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 				SOC_DTS_TE_AUX0 + thres_index,
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| 				te_out);
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| 	if (status)
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| 		goto err_restore_te_out;
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| 
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| 	return 0;
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| err_restore_te_out:
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| 	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 		       SOC_DTS_OFFSET_PTMC, store_te_out);
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| err_restore_ptmc:
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| 	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 		       SOC_DTS_OFFSET_PTMC, store_ptmc);
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| err_restore_ptps:
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| 	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 		       SOC_DTS_OFFSET_PTPS, store_ptps);
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| 	/* Nothing we can do if restore fails */
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| 
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| 	return status;
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| }
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| 
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| static int sys_set_trip_temp(struct thermal_zone_device *tzd,
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| 			     const struct thermal_trip *trip,
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| 			     int temp)
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| {
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| 	struct intel_soc_dts_sensor_entry *dts = thermal_zone_device_priv(tzd);
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| 	struct intel_soc_dts_sensors *sensors = dts->sensors;
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| 	unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
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| 	int status;
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| 
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| 	if (temp > sensors->tj_max)
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| 		return -EINVAL;
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| 
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| 	mutex_lock(&sensors->dts_update_lock);
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| 	status = update_trip_temp(sensors, trip_index, temp);
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| 	mutex_unlock(&sensors->dts_update_lock);
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| 
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| 	return status;
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| }
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| 
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| static int sys_get_curr_temp(struct thermal_zone_device *tzd,
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| 			     int *temp)
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| {
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| 	int status;
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| 	u32 out;
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| 	struct intel_soc_dts_sensor_entry *dts = thermal_zone_device_priv(tzd);
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| 	struct intel_soc_dts_sensors *sensors;
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| 	unsigned long raw;
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| 
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| 	sensors = dts->sensors;
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_OFFSET_TEMP, &out);
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| 	if (status)
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| 		return status;
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| 
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| 	raw = out;
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| 	out = bitmap_get_value8(&raw, dts->id * 8) - SOC_DTS_TJMAX_ENCODING;
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| 	*temp = sensors->tj_max - out * 1000;
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| 
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| 	return 0;
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| }
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| 
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| static const struct thermal_zone_device_ops tzone_ops = {
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| 	.get_temp = sys_get_curr_temp,
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| 	.set_trip_temp = sys_set_trip_temp,
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| };
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| 
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| static int soc_dts_enable(int id)
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| {
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| 	u32 out;
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| 	int ret;
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| 
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| 	ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			    SOC_DTS_OFFSET_ENABLE, &out);
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| 	if (ret)
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| 		return ret;
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| 
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| 	if (!(out & BIT(id))) {
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| 		out |= BIT(id);
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| 		ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 				     SOC_DTS_OFFSET_ENABLE, out);
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| 		if (ret)
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| 			return ret;
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| 	}
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| 
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| 	return ret;
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| }
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| 
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| static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts)
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| {
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| 	iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 		       SOC_DTS_OFFSET_ENABLE, dts->store_status);
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| 	thermal_zone_device_unregister(dts->tzone);
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| }
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| 
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| static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
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| 				struct thermal_trip *trips)
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| {
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| 	char name[10];
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| 	u32 store_ptps;
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| 	int ret;
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| 
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| 	/* Store status to restor on exit */
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| 	ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			    SOC_DTS_OFFSET_ENABLE, &dts->store_status);
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| 	if (ret)
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| 		goto err_ret;
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| 
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| 	dts->id = id;
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| 
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| 	/* Check if the writable trip we provide is not used by BIOS */
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| 	ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			    SOC_DTS_OFFSET_PTPS, &store_ptps);
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| 	if (!ret) {
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| 		int i;
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| 
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| 		for (i = 0; i <= 1; i++) {
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| 			if (store_ptps & (0xFFU << i * 8))
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| 				trips[i].flags &= ~THERMAL_TRIP_FLAG_RW_TEMP;
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| 		}
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| 	}
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| 	snprintf(name, sizeof(name), "soc_dts%d", id);
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| 	dts->tzone = thermal_zone_device_register_with_trips(name, trips,
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| 							     SOC_MAX_DTS_TRIPS,
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| 							     0, dts, &tzone_ops,
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| 							     NULL, 0, 0);
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| 	if (IS_ERR(dts->tzone)) {
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| 		ret = PTR_ERR(dts->tzone);
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| 		goto err_ret;
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| 	}
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| 	ret = thermal_zone_device_enable(dts->tzone);
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| 	if (ret)
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| 		goto err_enable;
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| 
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| 	ret = soc_dts_enable(id);
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| 	if (ret)
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| 		goto err_enable;
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| 
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| 	return 0;
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| err_enable:
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| 	thermal_zone_device_unregister(dts->tzone);
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| err_ret:
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| 	return ret;
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| }
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| 
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| void intel_soc_dts_iosf_interrupt_handler(struct intel_soc_dts_sensors *sensors)
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| {
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| 	u32 sticky_out;
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| 	int status;
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| 	u32 ptmc_out;
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| 	unsigned long flags;
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| 
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| 	spin_lock_irqsave(&sensors->intr_notify_lock, flags);
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| 
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_OFFSET_PTMC, &ptmc_out);
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| 	ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT;
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| 	status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 				SOC_DTS_OFFSET_PTMC, ptmc_out);
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| 
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| 	status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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| 			       SOC_DTS_OFFSET_PTTSS, &sticky_out);
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| 	pr_debug("status %d PTTSS %x\n", status, sticky_out);
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| 	if (sticky_out & SOC_DTS_TRIP_MASK) {
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| 		int i;
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| 		/* reset sticky bit */
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| 		status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
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| 					SOC_DTS_OFFSET_PTTSS, sticky_out);
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| 		spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
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| 
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| 		for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
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| 			pr_debug("TZD update for zone %d\n", i);
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| 			thermal_zone_device_update(sensors->soc_dts[i].tzone,
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| 						   THERMAL_EVENT_UNSPECIFIED);
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| 		}
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| 	} else
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| 		spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
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| }
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| EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_interrupt_handler);
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| 
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| static void dts_trips_reset(struct intel_soc_dts_sensors *sensors, int dts_index)
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| {
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| 	update_trip_temp(sensors, 0, 0);
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| 	update_trip_temp(sensors, 1, 0);
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| }
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| 
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| static void set_trip(struct thermal_trip *trip, enum thermal_trip_type type,
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| 		     u8 flags, int temp, unsigned int index)
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| {
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| 	trip->type = type;
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| 	trip->flags = flags;
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| 	trip->temperature = temp;
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| 	trip->priv = THERMAL_INT_TO_TRIP_PRIV(index);
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| }
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| 
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| struct intel_soc_dts_sensors *
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| intel_soc_dts_iosf_init(enum intel_soc_dts_interrupt_type intr_type,
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| 			bool critical_trip, int crit_offset)
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| {
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| 	struct thermal_trip trips[SOC_MAX_DTS_SENSORS][SOC_MAX_DTS_TRIPS] = { 0 };
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| 	struct intel_soc_dts_sensors *sensors;
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| 	int tj_max;
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| 	int ret;
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| 	int i;
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| 
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| 	if (!iosf_mbi_available())
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| 		return ERR_PTR(-ENODEV);
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| 
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| 	tj_max = intel_tcc_get_tjmax(-1);
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| 	if (tj_max < 0)
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| 		return ERR_PTR(tj_max);
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| 
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| 	sensors = kzalloc(sizeof(*sensors), GFP_KERNEL);
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| 	if (!sensors)
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| 		return ERR_PTR(-ENOMEM);
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| 
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| 	spin_lock_init(&sensors->intr_notify_lock);
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| 	mutex_init(&sensors->dts_update_lock);
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| 	sensors->intr_type = intr_type;
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| 	sensors->tj_max = tj_max * 1000;
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| 
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| 	for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
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| 		int temp;
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| 
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| 		sensors->soc_dts[i].sensors = sensors;
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| 
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| 		set_trip(&trips[i][0], THERMAL_TRIP_PASSIVE,
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| 			 THERMAL_TRIP_FLAG_RW_TEMP, 0, 0);
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| 
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| 		ret = update_trip_temp(sensors, 0, 0);
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| 		if (ret)
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| 			goto err_reset_trips;
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| 
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| 		if (critical_trip) {
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| 			temp = sensors->tj_max - crit_offset;
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| 			set_trip(&trips[i][1], THERMAL_TRIP_CRITICAL, 0, temp, 1);
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| 		} else {
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| 			set_trip(&trips[i][1], THERMAL_TRIP_PASSIVE,
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| 				 THERMAL_TRIP_FLAG_RW_TEMP, 0, 1);
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| 			temp = 0;
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| 		}
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| 
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| 		ret = update_trip_temp(sensors, 1, temp);
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| 		if (ret)
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| 			goto err_reset_trips;
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| 	}
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| 
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| 	for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
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| 		ret = add_dts_thermal_zone(i, &sensors->soc_dts[i], trips[i]);
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| 		if (ret)
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| 			goto err_remove_zone;
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| 	}
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| 
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| 	return sensors;
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| 
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| err_remove_zone:
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| 	for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i)
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| 		remove_dts_thermal_zone(&sensors->soc_dts[i]);
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| 
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| err_reset_trips:
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| 	for (i = 0; i < SOC_MAX_DTS_SENSORS; i++)
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| 		dts_trips_reset(sensors, i);
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| 
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| 	kfree(sensors);
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| 	return ERR_PTR(ret);
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| }
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| EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_init);
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| 
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| void intel_soc_dts_iosf_exit(struct intel_soc_dts_sensors *sensors)
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| {
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| 	int i;
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| 
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| 	for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
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| 		remove_dts_thermal_zone(&sensors->soc_dts[i]);
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| 		dts_trips_reset(sensors, i);
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| 	}
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| 	kfree(sensors);
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| }
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| EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_exit);
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| 
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| MODULE_IMPORT_NS(INTEL_TCC);
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| MODULE_LICENSE("GPL v2");
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| MODULE_DESCRIPTION("SoC DTS driver using side band interface");
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