329 lines
8.4 KiB
C
329 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for LM70EVAL-LLP board for the LM70 sensor
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*
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* Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/parport.h>
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#include <linux/sysfs.h>
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#include <linux/workqueue.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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/*
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* The LM70 communicates with a host processor using a 3-wire variant of
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* the SPI/Microwire bus interface. This driver specifically supports an
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* NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel
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* port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
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* master controller driver. The hwmon/lm70 driver is a "SPI protocol
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* driver", layered on top of this one and usable without the lm70llp.
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*
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* Datasheet and Schematic:
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* The LM70 is a temperature sensor chip from National Semiconductor; its
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* datasheet is available at http://www.national.com/pf/LM/LM70.html
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* The schematic for this particular board (the LM70EVAL-LLP) is
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* available (on page 4) here:
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* http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf
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*
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* Also see Documentation/spi/spi-lm70llp.rst. The SPI<->parport code here is
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* (heavily) based on spi-butterfly by David Brownell.
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*
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* The LM70 LLP connects to the PC parallel port in the following manner:
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*
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* Parallel LM70 LLP
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* Port Direction JP2 Header
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* ----------- --------- ------------
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* D0 2 - -
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* D1 3 --> V+ 5
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* D2 4 --> V+ 5
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* D3 5 --> V+ 5
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* D4 6 --> V+ 5
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* D5 7 --> nCS 8
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* D6 8 --> SCLK 3
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* D7 9 --> SI/O 5
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* GND 25 - GND 7
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* Select 13 <-- SI/O 1
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*
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* Note that parport pin 13 actually gets inverted by the transistor
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* arrangement which lets either the parport or the LM70 drive the
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* SI/SO signal (see the schematic for details).
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*/
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#define DRVNAME "spi-lm70llp"
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#define lm70_INIT 0xBE
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#define SIO 0x10
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#define nCS 0x20
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#define SCLK 0x40
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/*-------------------------------------------------------------------------*/
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struct spi_lm70llp {
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struct spi_bitbang bitbang;
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struct parport *port;
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struct pardevice *pd;
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struct spi_device *spidev_lm70;
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struct spi_board_info info;
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//struct device *dev;
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};
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/* REVISIT : ugly global ; provides "exclusive open" facility */
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static struct spi_lm70llp *lm70llp;
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/*-------------------------------------------------------------------*/
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static inline struct spi_lm70llp *spidev_to_pp(struct spi_device *spi)
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{
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return spi->controller_data;
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}
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/*---------------------- LM70 LLP eval board-specific inlines follow */
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/* NOTE: we don't actually need to reread the output values, since they'll
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* still be what we wrote before. Plus, going through parport builds in
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* a ~1ms/operation delay; these SPI transfers could easily be faster.
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*/
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static inline void deassertCS(struct spi_lm70llp *pp)
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{
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u8 data = parport_read_data(pp->port);
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data &= ~0x80; /* pull D7/SI-out low while de-asserted */
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parport_write_data(pp->port, data | nCS);
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}
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static inline void assertCS(struct spi_lm70llp *pp)
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{
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u8 data = parport_read_data(pp->port);
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data |= 0x80; /* pull D7/SI-out high so lm70 drives SO-in */
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parport_write_data(pp->port, data & ~nCS);
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}
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static inline void clkHigh(struct spi_lm70llp *pp)
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{
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u8 data = parport_read_data(pp->port);
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parport_write_data(pp->port, data | SCLK);
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}
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static inline void clkLow(struct spi_lm70llp *pp)
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{
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u8 data = parport_read_data(pp->port);
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parport_write_data(pp->port, data & ~SCLK);
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}
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/*------------------------- SPI-LM70-specific inlines ----------------------*/
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static inline void spidelay(unsigned d)
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{
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udelay(d);
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}
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static inline void setsck(struct spi_device *s, int is_on)
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{
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struct spi_lm70llp *pp = spidev_to_pp(s);
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if (is_on)
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clkHigh(pp);
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else
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clkLow(pp);
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}
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static inline void setmosi(struct spi_device *s, int is_on)
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{
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/* FIXME update D7 ... this way we can put the chip
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* into shutdown mode and read the manufacturer ID,
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* but we can't put it back into operational mode.
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*/
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}
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/*
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* getmiso:
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* Why do we return 0 when the SIO line is high and vice-versa?
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* The fact is, the lm70 eval board from NS (which this driver drives),
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* is wired in just such a way : when the lm70's SIO goes high, a transistor
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* switches it to low reflecting this on the parport (pin 13), and vice-versa.
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*/
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static inline int getmiso(struct spi_device *s)
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{
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struct spi_lm70llp *pp = spidev_to_pp(s);
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return ((SIO == (parport_read_status(pp->port) & SIO)) ? 0 : 1);
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}
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/*--------------------------------------------------------------------*/
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#include "spi-bitbang-txrx.h"
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static void lm70_chipselect(struct spi_device *spi, int value)
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{
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struct spi_lm70llp *pp = spidev_to_pp(spi);
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if (value)
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assertCS(pp);
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else
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deassertCS(pp);
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}
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/*
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* Our actual bitbanger routine.
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*/
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static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits,
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unsigned flags)
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{
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
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}
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static void spi_lm70llp_attach(struct parport *p)
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{
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struct pardevice *pd;
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struct spi_lm70llp *pp;
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struct spi_master *master;
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int status;
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struct pardev_cb lm70llp_cb;
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if (lm70llp) {
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pr_warn("spi_lm70llp instance already loaded. Aborting.\n");
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return;
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}
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/* TODO: this just _assumes_ a lm70 is there ... no probe;
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* the lm70 driver could verify it, reading the manf ID.
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*/
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master = spi_alloc_master(p->physport->dev, sizeof(*pp));
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if (!master) {
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status = -ENOMEM;
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goto out_fail;
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}
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pp = spi_master_get_devdata(master);
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/*
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* SPI and bitbang hookup.
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*/
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pp->bitbang.master = master;
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pp->bitbang.chipselect = lm70_chipselect;
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pp->bitbang.txrx_word[SPI_MODE_0] = lm70_txrx;
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pp->bitbang.flags = SPI_3WIRE;
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/*
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* Parport hookup
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*/
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pp->port = p;
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memset(&lm70llp_cb, 0, sizeof(lm70llp_cb));
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lm70llp_cb.private = pp;
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lm70llp_cb.flags = PARPORT_FLAG_EXCL;
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pd = parport_register_dev_model(p, DRVNAME, &lm70llp_cb, 0);
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if (!pd) {
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status = -ENOMEM;
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goto out_free_master;
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}
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pp->pd = pd;
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status = parport_claim(pd);
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if (status < 0)
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goto out_parport_unreg;
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/*
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* Start SPI ...
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*/
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status = spi_bitbang_start(&pp->bitbang);
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if (status < 0) {
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dev_warn(&pd->dev, "spi_bitbang_start failed with status %d\n",
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status);
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goto out_off_and_release;
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}
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/*
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* The modalias name MUST match the device_driver name
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* for the bus glue code to match and subsequently bind them.
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* We are binding to the generic drivers/hwmon/lm70.c device
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* driver.
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*/
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strcpy(pp->info.modalias, "lm70");
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pp->info.max_speed_hz = 6 * 1000 * 1000;
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pp->info.chip_select = 0;
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pp->info.mode = SPI_3WIRE | SPI_MODE_0;
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/* power up the chip, and let the LM70 control SI/SO */
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parport_write_data(pp->port, lm70_INIT);
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/* Enable access to our primary data structure via
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* the board info's (void *)controller_data.
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*/
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pp->info.controller_data = pp;
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pp->spidev_lm70 = spi_new_device(pp->bitbang.master, &pp->info);
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if (pp->spidev_lm70)
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dev_dbg(&pp->spidev_lm70->dev, "spidev_lm70 at %s\n",
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dev_name(&pp->spidev_lm70->dev));
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else {
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dev_warn(&pd->dev, "spi_new_device failed\n");
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status = -ENODEV;
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goto out_bitbang_stop;
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}
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pp->spidev_lm70->bits_per_word = 8;
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lm70llp = pp;
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return;
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out_bitbang_stop:
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spi_bitbang_stop(&pp->bitbang);
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out_off_and_release:
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/* power down */
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parport_write_data(pp->port, 0);
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mdelay(10);
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parport_release(pp->pd);
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out_parport_unreg:
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parport_unregister_device(pd);
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out_free_master:
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spi_master_put(master);
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out_fail:
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pr_info("spi_lm70llp probe fail, status %d\n", status);
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}
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static void spi_lm70llp_detach(struct parport *p)
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{
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struct spi_lm70llp *pp;
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if (!lm70llp || lm70llp->port != p)
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return;
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pp = lm70llp;
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spi_bitbang_stop(&pp->bitbang);
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/* power down */
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parport_write_data(pp->port, 0);
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parport_release(pp->pd);
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parport_unregister_device(pp->pd);
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spi_master_put(pp->bitbang.master);
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lm70llp = NULL;
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}
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static struct parport_driver spi_lm70llp_drv = {
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.name = DRVNAME,
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.match_port = spi_lm70llp_attach,
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.detach = spi_lm70llp_detach,
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.devmodel = true,
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};
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module_parport_driver(spi_lm70llp_drv);
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MODULE_AUTHOR("Kaiwan N Billimoria <kaiwan@designergraphix.com>");
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MODULE_DESCRIPTION(
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"Parport adapter for the National Semiconductor LM70 LLP eval board");
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MODULE_LICENSE("GPL");
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