363 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			363 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| 
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| /*
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|  * The RTC driver for Sunplus	SP7021
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|  *
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|  * Copyright (C) 2019 Sunplus Technology Inc., All rights reseerved.
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|  */
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| 
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| #include <linux/bitfield.h>
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| #include <linux/clk.h>
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| #include <linux/err.h>
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| #include <linux/io.h>
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| #include <linux/ktime.h>
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| #include <linux/module.h>
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| #include <linux/of.h>
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| #include <linux/platform_device.h>
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| #include <linux/reset.h>
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| #include <linux/rtc.h>
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| 
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| #define RTC_REG_NAME			"rtc"
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| 
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| #define RTC_CTRL			0x40
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| #define TIMER_FREEZE_MASK_BIT		BIT(5 + 16)
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| #define TIMER_FREEZE			BIT(5)
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| #define DIS_SYS_RST_RTC_MASK_BIT	BIT(4 + 16)
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| #define DIS_SYS_RST_RTC			BIT(4)
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| #define RTC32K_MODE_RESET_MASK_BIT	BIT(3 + 16)
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| #define RTC32K_MODE_RESET		BIT(3)
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| #define ALARM_EN_OVERDUE_MASK_BIT	BIT(2 + 16)
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| #define ALARM_EN_OVERDUE		BIT(2)
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| #define ALARM_EN_PMC_MASK_BIT		BIT(1 + 16)
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| #define ALARM_EN_PMC			BIT(1)
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| #define ALARM_EN_MASK_BIT		BIT(0 + 16)
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| #define ALARM_EN			BIT(0)
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| #define RTC_TIMER_OUT			0x44
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| #define RTC_DIVIDER			0x48
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| #define RTC_TIMER_SET			0x4c
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| #define RTC_ALARM_SET			0x50
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| #define RTC_USER_DATA			0x54
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| #define RTC_RESET_RECORD		0x58
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| #define RTC_BATT_CHARGE_CTRL		0x5c
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| #define BAT_CHARGE_RSEL_MASK_BIT	GENMASK(3 + 16, 2 + 16)
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| #define BAT_CHARGE_RSEL_MASK		GENMASK(3, 2)
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| #define BAT_CHARGE_RSEL_2K_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 0)
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| #define BAT_CHARGE_RSEL_250_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 1)
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| #define BAT_CHARGE_RSEL_50_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 2)
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| #define BAT_CHARGE_RSEL_0_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 3)
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| #define BAT_CHARGE_DSEL_MASK_BIT	BIT(1 + 16)
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| #define BAT_CHARGE_DSEL_MASK		GENMASK(1, 1)
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| #define BAT_CHARGE_DSEL_ON		FIELD_PREP(BAT_CHARGE_DSEL_MASK, 0)
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| #define BAT_CHARGE_DSEL_OFF		FIELD_PREP(BAT_CHARGE_DSEL_MASK, 1)
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| #define BAT_CHARGE_EN_MASK_BIT		BIT(0 + 16)
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| #define BAT_CHARGE_EN			BIT(0)
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| #define RTC_TRIM_CTRL			0x60
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| 
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| struct sunplus_rtc {
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| 	struct rtc_device *rtc;
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| 	struct resource *res;
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| 	struct clk *rtcclk;
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| 	struct reset_control *rstc;
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| 	void __iomem *reg_base;
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| 	int irq;
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| };
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| 
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| static void sp_get_seconds(struct device *dev, unsigned long *secs)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 
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| 	*secs = (unsigned long)readl(sp_rtc->reg_base + RTC_TIMER_OUT);
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| }
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| 
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| static void sp_set_seconds(struct device *dev, unsigned long secs)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 
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| 	writel((u32)secs, sp_rtc->reg_base + RTC_TIMER_SET);
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| }
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| 
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| static int sp_rtc_read_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	unsigned long secs;
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| 
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| 	sp_get_seconds(dev, &secs);
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| 	rtc_time64_to_tm(secs, tm);
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| 
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| 	return 0;
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| }
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| 
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| static int sp_rtc_set_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	unsigned long secs;
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| 
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| 	secs = rtc_tm_to_time64(tm);
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| 	dev_dbg(dev, "%s, secs = %lu\n", __func__, secs);
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| 	sp_set_seconds(dev, secs);
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| 
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| 	return 0;
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| }
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| 
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| static int sp_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 	unsigned long alarm_time;
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| 
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| 	alarm_time = rtc_tm_to_time64(&alrm->time);
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| 	dev_dbg(dev, "%s, alarm_time: %u\n", __func__, (u32)(alarm_time));
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| 	writel((u32)alarm_time, sp_rtc->reg_base + RTC_ALARM_SET);
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| 
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| 	return 0;
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| }
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| 
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| static int sp_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 	unsigned int alarm_time;
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| 
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| 	alarm_time = readl(sp_rtc->reg_base + RTC_ALARM_SET);
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| 	dev_dbg(dev, "%s, alarm_time: %u\n", __func__, alarm_time);
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| 
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| 	if (alarm_time == 0)
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| 		alrm->enabled = 0;
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| 	else
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| 		alrm->enabled = 1;
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| 
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| 	rtc_time64_to_tm((unsigned long)(alarm_time), &alrm->time);
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| 
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| 	return 0;
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| }
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| 
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| static int sp_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 
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| 	if (enabled)
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| 		writel((TIMER_FREEZE_MASK_BIT | DIS_SYS_RST_RTC_MASK_BIT |
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| 			RTC32K_MODE_RESET_MASK_BIT | ALARM_EN_OVERDUE_MASK_BIT |
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| 			ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
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| 			(DIS_SYS_RST_RTC | ALARM_EN_OVERDUE | ALARM_EN_PMC | ALARM_EN),
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| 			sp_rtc->reg_base + RTC_CTRL);
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| 	else
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| 		writel((ALARM_EN_OVERDUE_MASK_BIT | ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
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| 			0x0, sp_rtc->reg_base + RTC_CTRL);
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| 
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| 	return 0;
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| }
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| 
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| static const struct rtc_class_ops sp_rtc_ops = {
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| 	.read_time =		sp_rtc_read_time,
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| 	.set_time =		sp_rtc_set_time,
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| 	.set_alarm =		sp_rtc_set_alarm,
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| 	.read_alarm =		sp_rtc_read_alarm,
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| 	.alarm_irq_enable =	sp_rtc_alarm_irq_enable,
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| };
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| 
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| static irqreturn_t sp_rtc_irq_handler(int irq, void *dev_id)
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| {
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| 	struct platform_device *plat_dev = dev_id;
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
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| 
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| 	rtc_update_irq(sp_rtc->rtc, 1, RTC_IRQF | RTC_AF);
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| 	dev_dbg(&plat_dev->dev, "[RTC] ALARM INT\n");
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| /*
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|  * -------------------------------------------------------------------------------------
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|  * bat_charge_rsel   bat_charge_dsel   bat_charge_en     Remarks
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|  *         x              x                 0            Disable
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|  *         0              0                 1            0.86mA (2K Ohm with diode)
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|  *         1              0                 1            1.81mA (250 Ohm with diode)
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|  *         2              0                 1            2.07mA (50 Ohm with diode)
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|  *         3              0                 1            16.0mA (0 Ohm with diode)
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|  *         0              1                 1            1.36mA (2K Ohm without diode)
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|  *         1              1                 1            3.99mA (250 Ohm without diode)
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|  *         2              1                 1            4.41mA (50 Ohm without diode)
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|  *         3              1                 1            16.0mA (0 Ohm without diode)
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|  * -------------------------------------------------------------------------------------
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|  */
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| static void sp_rtc_set_trickle_charger(struct device dev)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&dev);
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| 	u32 ohms, rsel;
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| 	u32 chargeable;
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| 
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| 	if (of_property_read_u32(dev.of_node, "trickle-resistor-ohms", &ohms) ||
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| 	    of_property_read_u32(dev.of_node, "aux-voltage-chargeable", &chargeable)) {
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| 		dev_warn(&dev, "battery charger disabled\n");
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| 		return;
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| 	}
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| 
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| 	switch (ohms) {
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| 	case 2000:
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| 		rsel = BAT_CHARGE_RSEL_2K_OHM;
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| 		break;
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| 	case 250:
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| 		rsel = BAT_CHARGE_RSEL_250_OHM;
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| 		break;
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| 	case 50:
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| 		rsel = BAT_CHARGE_RSEL_50_OHM;
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| 		break;
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| 	case 0:
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| 		rsel = BAT_CHARGE_RSEL_0_OHM;
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| 		break;
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| 	default:
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| 		dev_err(&dev, "invalid charger resistor value (%d)\n", ohms);
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| 		return;
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| 	}
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| 
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| 	writel(BAT_CHARGE_RSEL_MASK_BIT | rsel, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
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| 
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| 	switch (chargeable) {
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| 	case 0:
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| 		writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_OFF,
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| 		       sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
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| 		break;
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| 	case 1:
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| 		writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_ON,
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| 		       sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
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| 		break;
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| 	default:
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| 		dev_err(&dev, "invalid aux-voltage-chargeable value (%d)\n", chargeable);
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| 		return;
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| 	}
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| 
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| 	writel(BAT_CHARGE_EN_MASK_BIT | BAT_CHARGE_EN, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
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| }
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| 
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| static int sp_rtc_probe(struct platform_device *plat_dev)
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| {
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| 	struct sunplus_rtc *sp_rtc;
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| 	int ret;
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| 
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| 	sp_rtc = devm_kzalloc(&plat_dev->dev, sizeof(*sp_rtc), GFP_KERNEL);
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| 	if (!sp_rtc)
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| 		return -ENOMEM;
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| 
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| 	sp_rtc->res = platform_get_resource_byname(plat_dev, IORESOURCE_MEM, RTC_REG_NAME);
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| 	sp_rtc->reg_base = devm_ioremap_resource(&plat_dev->dev, sp_rtc->res);
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| 	if (IS_ERR(sp_rtc->reg_base))
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| 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->reg_base),
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| 					    "%s devm_ioremap_resource fail\n", RTC_REG_NAME);
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| 	dev_dbg(&plat_dev->dev, "res = %pR, reg_base = %p\n",
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| 		sp_rtc->res, sp_rtc->reg_base);
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| 
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| 	sp_rtc->irq = platform_get_irq(plat_dev, 0);
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| 	if (sp_rtc->irq < 0)
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| 		return dev_err_probe(&plat_dev->dev, sp_rtc->irq, "platform_get_irq failed\n");
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| 
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| 	ret = devm_request_irq(&plat_dev->dev, sp_rtc->irq, sp_rtc_irq_handler,
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| 			       IRQF_TRIGGER_RISING, "rtc irq", plat_dev);
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| 	if (ret)
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| 		return dev_err_probe(&plat_dev->dev, ret, "devm_request_irq failed:\n");
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| 
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| 	sp_rtc->rtcclk = devm_clk_get(&plat_dev->dev, NULL);
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| 	if (IS_ERR(sp_rtc->rtcclk))
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| 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rtcclk),
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| 					    "devm_clk_get fail\n");
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| 
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| 	sp_rtc->rstc = devm_reset_control_get_exclusive(&plat_dev->dev, NULL);
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| 	if (IS_ERR(sp_rtc->rstc))
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| 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rstc),
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| 					    "failed to retrieve reset controller\n");
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| 
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| 	ret = clk_prepare_enable(sp_rtc->rtcclk);
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| 	if (ret)
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| 		goto free_clk;
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| 
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| 	ret = reset_control_deassert(sp_rtc->rstc);
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| 	if (ret)
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| 		goto free_reset_assert;
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| 
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| 	device_init_wakeup(&plat_dev->dev, 1);
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| 	dev_set_drvdata(&plat_dev->dev, sp_rtc);
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| 
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| 	sp_rtc->rtc = devm_rtc_allocate_device(&plat_dev->dev);
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| 	if (IS_ERR(sp_rtc->rtc)) {
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| 		ret = PTR_ERR(sp_rtc->rtc);
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| 		goto free_reset_assert;
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| 	}
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| 
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| 	sp_rtc->rtc->range_max = U32_MAX;
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| 	sp_rtc->rtc->range_min = 0;
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| 	sp_rtc->rtc->ops = &sp_rtc_ops;
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| 
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| 	ret = devm_rtc_register_device(sp_rtc->rtc);
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| 	if (ret)
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| 		goto free_reset_assert;
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| 
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| 	/* Setup trickle charger */
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| 	if (plat_dev->dev.of_node)
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| 		sp_rtc_set_trickle_charger(plat_dev->dev);
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| 
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| 	/* Keep RTC from system reset */
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| 	writel(DIS_SYS_RST_RTC_MASK_BIT | DIS_SYS_RST_RTC, sp_rtc->reg_base + RTC_CTRL);
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| 
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| 	return 0;
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| 
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| free_reset_assert:
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| 	reset_control_assert(sp_rtc->rstc);
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| free_clk:
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| 	clk_disable_unprepare(sp_rtc->rtcclk);
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| 
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| 	return ret;
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| }
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| 
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| static int sp_rtc_remove(struct platform_device *plat_dev)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
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| 
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| 	device_init_wakeup(&plat_dev->dev, 0);
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| 	reset_control_assert(sp_rtc->rstc);
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| 	clk_disable_unprepare(sp_rtc->rtcclk);
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| 
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_PM_SLEEP
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| static int sp_rtc_suspend(struct device *dev)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 
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| 	if (device_may_wakeup(dev))
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| 		enable_irq_wake(sp_rtc->irq);
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| 
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| 	return 0;
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| }
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| 
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| static int sp_rtc_resume(struct device *dev)
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| {
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| 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
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| 
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| 	if (device_may_wakeup(dev))
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| 		disable_irq_wake(sp_rtc->irq);
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| 
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| 	return 0;
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| }
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| #endif
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| 
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| static const struct of_device_id sp_rtc_of_match[] = {
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| 	{ .compatible = "sunplus,sp7021-rtc" },
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| 	{ /* sentinel */ }
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| };
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| MODULE_DEVICE_TABLE(of, sp_rtc_of_match);
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| 
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| static SIMPLE_DEV_PM_OPS(sp_rtc_pm_ops, sp_rtc_suspend, sp_rtc_resume);
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| 
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| static struct platform_driver sp_rtc_driver = {
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| 	.probe   = sp_rtc_probe,
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| 	.remove  = sp_rtc_remove,
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| 	.driver  = {
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| 		.name	= "sp7021-rtc",
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| 		.of_match_table = sp_rtc_of_match,
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| 		.pm	= &sp_rtc_pm_ops,
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| 	},
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| };
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| module_platform_driver(sp_rtc_driver);
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| 
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| MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>");
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| MODULE_DESCRIPTION("Sunplus RTC driver");
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| MODULE_LICENSE("GPL v2");
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| 
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