372 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			372 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| 
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| #include <linux/bits.h>
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| #include <linux/i2c.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/of_device.h>
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| #include <linux/regmap.h>
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| #include <linux/regulator/driver.h>
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| #include <linux/regulator/of_regulator.h>
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| 
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| #define RT5759_REG_VENDORINFO	0x00
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| #define RT5759_REG_FREQ		0x01
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| #define RT5759_REG_VSEL		0x02
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| #define RT5759_REG_DCDCCTRL	0x03
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| #define RT5759_REG_STATUS	0x04
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| #define RT5759_REG_DCDCSET	0x05
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| #define RT5759A_REG_WDTEN	0x42
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| 
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| #define RT5759_TSTEP_MASK	GENMASK(3, 2)
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| #define RT5759_VSEL_MASK	GENMASK(6, 0)
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| #define RT5759_DISCHARGE_MASK	BIT(3)
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| #define RT5759_FPWM_MASK	BIT(2)
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| #define RT5759_ENABLE_MASK	BIT(1)
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| #define RT5759_OT_MASK		BIT(1)
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| #define RT5759_UV_MASK		BIT(0)
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| #define RT5957_OCLVL_MASK	GENMASK(7, 6)
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| #define RT5759_OCLVL_SHIFT	6
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| #define RT5957_OTLVL_MASK	GENMASK(5, 4)
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| #define RT5759_OTLVL_SHIFT	4
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| #define RT5759A_WDTEN_MASK	BIT(1)
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| 
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| #define RT5759_MANUFACTURER_ID	0x82
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| /* vsel range 0x00 ~ 0x5A */
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| #define RT5759_NUM_VOLTS	91
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| #define RT5759_MIN_UV		600000
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| #define RT5759_STEP_UV		10000
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| #define RT5759A_STEP_UV		12500
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| #define RT5759_MINSS_TIMEUS	1500
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| 
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| #define RT5759_PSKIP_MODE	0
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| #define RT5759_FPWM_MODE	1
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| 
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| enum {
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| 	CHIP_TYPE_RT5759 = 0,
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| 	CHIP_TYPE_RT5759A,
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| 	CHIP_TYPE_MAX
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| };
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| 
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| struct rt5759_priv {
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| 	struct device *dev;
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| 	struct regmap *regmap;
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| 	struct regulator_desc desc;
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| 	unsigned long chip_type;
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| };
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| 
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| static int rt5759_set_mode(struct regulator_dev *rdev, unsigned int mode)
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| {
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| 	struct regmap *regmap = rdev_get_regmap(rdev);
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| 	unsigned int mode_val;
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| 
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| 	switch (mode) {
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| 	case REGULATOR_MODE_NORMAL:
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| 		mode_val = 0;
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| 		break;
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| 	case REGULATOR_MODE_FAST:
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| 		mode_val = RT5759_FPWM_MASK;
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return regmap_update_bits(regmap, RT5759_REG_STATUS, RT5759_FPWM_MASK,
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| 				  mode_val);
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| }
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| 
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| static unsigned int rt5759_get_mode(struct regulator_dev *rdev)
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| {
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| 	struct regmap *regmap = rdev_get_regmap(rdev);
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| 	unsigned int regval;
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| 	int ret;
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| 
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| 	ret = regmap_read(regmap, RT5759_REG_DCDCCTRL, ®val);
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| 	if (ret)
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| 		return REGULATOR_MODE_INVALID;
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| 
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| 	if (regval & RT5759_FPWM_MASK)
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| 		return REGULATOR_MODE_FAST;
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| 
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| 	return REGULATOR_MODE_NORMAL;
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| }
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| 
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| static int rt5759_get_error_flags(struct regulator_dev *rdev,
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| 				  unsigned int *flags)
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| {
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| 	struct regmap *regmap = rdev_get_regmap(rdev);
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| 	unsigned int status, events = 0;
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| 	int ret;
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| 
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| 	ret = regmap_read(regmap, RT5759_REG_STATUS, &status);
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| 	if (ret)
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| 		return ret;
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| 
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| 	if (status & RT5759_OT_MASK)
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| 		events |= REGULATOR_ERROR_OVER_TEMP;
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| 
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| 	if (status & RT5759_UV_MASK)
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| 		events |= REGULATOR_ERROR_UNDER_VOLTAGE;
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| 
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| 	*flags = events;
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| 	return 0;
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| }
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| 
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| static int rt5759_set_ocp(struct regulator_dev *rdev, int lim_uA, int severity,
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| 			  bool enable)
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| {
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| 	struct regmap *regmap = rdev_get_regmap(rdev);
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| 	int ocp_lvl[] = { 9800000, 10800000, 11800000 };
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| 	unsigned int ocp_regval;
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| 	int i;
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| 
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| 	/* Only support over current protection parameter */
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| 	if (severity != REGULATOR_SEVERITY_PROT)
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| 		return 0;
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| 
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| 	if (enable) {
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| 		/* Default ocp level is 10.8A */
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| 		if (lim_uA == 0)
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| 			lim_uA = 10800000;
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| 
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| 		for (i = 0; i < ARRAY_SIZE(ocp_lvl); i++) {
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| 			if (lim_uA <= ocp_lvl[i])
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| 				break;
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| 		}
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| 
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| 		if (i == ARRAY_SIZE(ocp_lvl))
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| 			i = ARRAY_SIZE(ocp_lvl) - 1;
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| 
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| 		ocp_regval = i + 1;
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| 	} else
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| 		ocp_regval = 0;
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| 
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| 	return regmap_update_bits(regmap, RT5759_REG_DCDCSET, RT5957_OCLVL_MASK,
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| 				  ocp_regval << RT5759_OCLVL_SHIFT);
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| }
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| 
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| static int rt5759_set_otp(struct regulator_dev *rdev, int lim, int severity,
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| 			  bool enable)
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| {
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| 	struct regmap *regmap = rdev_get_regmap(rdev);
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| 	int otp_lvl[] = { 140, 150, 170 };
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| 	unsigned int otp_regval;
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| 	int i;
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| 
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| 	/* Only support over temperature protection parameter */
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| 	if (severity != REGULATOR_SEVERITY_PROT)
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| 		return 0;
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| 
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| 	if (enable) {
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| 		/* Default otp level is 150'c */
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| 		if (lim == 0)
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| 			lim = 150;
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| 
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| 		for (i = 0; i < ARRAY_SIZE(otp_lvl); i++) {
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| 			if (lim <= otp_lvl[i])
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| 				break;
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| 		}
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| 
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| 		if (i == ARRAY_SIZE(otp_lvl))
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| 			i = ARRAY_SIZE(otp_lvl) - 1;
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| 
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| 		otp_regval = i + 1;
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| 	} else
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| 		otp_regval = 0;
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| 
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| 	return regmap_update_bits(regmap, RT5759_REG_DCDCSET, RT5957_OTLVL_MASK,
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| 				  otp_regval << RT5759_OTLVL_SHIFT);
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| }
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| 
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| static const struct regulator_ops rt5759_regulator_ops = {
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| 	.list_voltage = regulator_list_voltage_linear,
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| 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
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| 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
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| 	.enable = regulator_enable_regmap,
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| 	.disable = regulator_disable_regmap,
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| 	.is_enabled = regulator_is_enabled_regmap,
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| 	.set_active_discharge = regulator_set_active_discharge_regmap,
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| 	.set_mode = rt5759_set_mode,
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| 	.get_mode = rt5759_get_mode,
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| 	.set_ramp_delay = regulator_set_ramp_delay_regmap,
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| 	.get_error_flags = rt5759_get_error_flags,
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| 	.set_over_current_protection = rt5759_set_ocp,
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| 	.set_thermal_protection = rt5759_set_otp,
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| };
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| 
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| static unsigned int rt5759_of_map_mode(unsigned int mode)
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| {
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| 	switch (mode) {
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| 	case RT5759_FPWM_MODE:
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| 		return REGULATOR_MODE_FAST;
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| 	case RT5759_PSKIP_MODE:
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| 		return REGULATOR_MODE_NORMAL;
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| 	default:
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| 		return REGULATOR_MODE_INVALID;
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| 	}
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| }
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| 
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| static const unsigned int rt5759_ramp_table[] = { 20000, 15000, 10000, 5000 };
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| 
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| static int rt5759_regulator_register(struct rt5759_priv *priv)
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| {
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| 	struct device_node *np = priv->dev->of_node;
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| 	struct regulator_desc *reg_desc = &priv->desc;
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| 	struct regulator_config reg_cfg;
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| 	struct regulator_dev *rdev;
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| 	int ret;
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| 
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| 	reg_desc->name = "rt5759-buck";
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| 	reg_desc->type = REGULATOR_VOLTAGE;
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| 	reg_desc->owner = THIS_MODULE;
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| 	reg_desc->ops = &rt5759_regulator_ops;
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| 	reg_desc->n_voltages = RT5759_NUM_VOLTS;
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| 	reg_desc->min_uV = RT5759_MIN_UV;
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| 	reg_desc->uV_step = RT5759_STEP_UV;
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| 	reg_desc->vsel_reg = RT5759_REG_VSEL;
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| 	reg_desc->vsel_mask = RT5759_VSEL_MASK;
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| 	reg_desc->enable_reg = RT5759_REG_DCDCCTRL;
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| 	reg_desc->enable_mask = RT5759_ENABLE_MASK;
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| 	reg_desc->active_discharge_reg = RT5759_REG_DCDCCTRL;
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| 	reg_desc->active_discharge_mask = RT5759_DISCHARGE_MASK;
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| 	reg_desc->active_discharge_on = RT5759_DISCHARGE_MASK;
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| 	reg_desc->ramp_reg = RT5759_REG_FREQ;
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| 	reg_desc->ramp_mask = RT5759_TSTEP_MASK;
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| 	reg_desc->ramp_delay_table = rt5759_ramp_table;
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| 	reg_desc->n_ramp_values = ARRAY_SIZE(rt5759_ramp_table);
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| 	reg_desc->enable_time = RT5759_MINSS_TIMEUS;
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| 	reg_desc->of_map_mode = rt5759_of_map_mode;
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| 
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| 	/*
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| 	 * RT5759 step uV = 10000
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| 	 * RT5759A step uV = 12500
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| 	 */
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| 	if (priv->chip_type == CHIP_TYPE_RT5759A)
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| 		reg_desc->uV_step = RT5759A_STEP_UV;
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| 
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| 	memset(®_cfg, 0, sizeof(reg_cfg));
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| 	reg_cfg.dev = priv->dev;
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| 	reg_cfg.of_node = np;
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| 	reg_cfg.init_data = of_get_regulator_init_data(priv->dev, np, reg_desc);
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| 	reg_cfg.regmap = priv->regmap;
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| 
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| 	rdev = devm_regulator_register(priv->dev, reg_desc, ®_cfg);
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| 	if (IS_ERR(rdev)) {
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| 		ret = PTR_ERR(rdev);
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| 		dev_err(priv->dev, "Failed to register regulator (%d)\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int rt5759_init_device_property(struct rt5759_priv *priv)
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| {
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| 	unsigned int val = 0;
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| 
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| 	/*
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| 	 * Only RT5759A support external watchdog input
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| 	 */
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| 	if (priv->chip_type != CHIP_TYPE_RT5759A)
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| 		return 0;
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| 
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| 	if (device_property_read_bool(priv->dev, "richtek,watchdog-enable"))
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| 		val = RT5759A_WDTEN_MASK;
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| 
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| 	return regmap_update_bits(priv->regmap, RT5759A_REG_WDTEN,
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| 				  RT5759A_WDTEN_MASK, val);
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| }
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| 
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| static int rt5759_manufacturer_check(struct rt5759_priv *priv)
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| {
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| 	unsigned int vendor;
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| 	int ret;
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| 
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| 	ret = regmap_read(priv->regmap, RT5759_REG_VENDORINFO, &vendor);
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| 	if (ret)
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| 		return ret;
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| 
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| 	if (vendor != RT5759_MANUFACTURER_ID) {
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| 		dev_err(priv->dev, "vendor info not correct (%d)\n", vendor);
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static bool rt5759_is_accessible_reg(struct device *dev, unsigned int reg)
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| {
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| 	struct rt5759_priv *priv = dev_get_drvdata(dev);
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| 
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| 	if (reg <= RT5759_REG_DCDCSET)
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| 		return true;
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| 
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| 	if (priv->chip_type == CHIP_TYPE_RT5759A && reg == RT5759A_REG_WDTEN)
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| 		return true;
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| 
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| 	return false;
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| }
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| 
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| static const struct regmap_config rt5759_regmap_config = {
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| 	.reg_bits = 8,
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| 	.val_bits = 8,
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| 	.max_register = RT5759A_REG_WDTEN,
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| 	.readable_reg = rt5759_is_accessible_reg,
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| 	.writeable_reg = rt5759_is_accessible_reg,
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| };
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| 
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| static int rt5759_probe(struct i2c_client *i2c)
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| {
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| 	struct rt5759_priv *priv;
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| 	int ret;
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| 
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| 	priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
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| 	if (!priv)
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| 		return -ENOMEM;
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| 
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| 	priv->dev = &i2c->dev;
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| 	priv->chip_type = (unsigned long)of_device_get_match_data(&i2c->dev);
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| 	i2c_set_clientdata(i2c, priv);
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| 
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| 	priv->regmap = devm_regmap_init_i2c(i2c, &rt5759_regmap_config);
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| 	if (IS_ERR(priv->regmap)) {
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| 		ret = PTR_ERR(priv->regmap);
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| 		dev_err(&i2c->dev, "Failed to allocate regmap (%d)\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = rt5759_manufacturer_check(priv);
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| 	if (ret) {
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| 		dev_err(&i2c->dev, "Failed to check device (%d)\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = rt5759_init_device_property(priv);
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| 	if (ret) {
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| 		dev_err(&i2c->dev, "Failed to init device (%d)\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	return rt5759_regulator_register(priv);
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| }
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| 
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| static const struct of_device_id __maybe_unused rt5759_device_table[] = {
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| 	{ .compatible = "richtek,rt5759", .data = (void *)CHIP_TYPE_RT5759 },
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| 	{ .compatible = "richtek,rt5759a", .data = (void *)CHIP_TYPE_RT5759A },
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| 	{}
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| };
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| MODULE_DEVICE_TABLE(of, rt5759_device_table);
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| 
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| static struct i2c_driver rt5759_driver = {
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| 	.driver = {
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| 		.name = "rt5759",
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| 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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| 		.of_match_table = of_match_ptr(rt5759_device_table),
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| 	},
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| 	.probe_new = rt5759_probe,
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| };
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| module_i2c_driver(rt5759_driver);
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| 
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| MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
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| MODULE_DESCRIPTION("Richtek RT5759 Regulator Driver");
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| MODULE_LICENSE("GPL v2");
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