215 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			215 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-or-later
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| /*
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|  * PWM framework driver for Cirrus Logic EP93xx
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|  *
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|  * Copyright (c) 2009        Matthieu Crapet <mcrapet@gmail.com>
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|  * Copyright (c) 2009, 2013  H Hartley Sweeten <hsweeten@visionengravers.com>
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|  *
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|  * EP9301/02 have only one channel:
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|  *   platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
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|  *
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|  * EP9307 has only one channel:
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|  *   platform device ep93xx-pwm.0 - PWMOUT
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|  *
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|  * EP9312/15 have two channels:
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|  *   platform device ep93xx-pwm.0 - PWMOUT
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|  *   platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/platform_device.h>
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| #include <linux/slab.h>
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| #include <linux/clk.h>
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| #include <linux/err.h>
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| #include <linux/io.h>
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| #include <linux/pwm.h>
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| 
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| #include <asm/div64.h>
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| 
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| #include <linux/soc/cirrus/ep93xx.h>	/* for ep93xx_pwm_{acquire,release}_gpio() */
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| 
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| #define EP93XX_PWMx_TERM_COUNT	0x00
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| #define EP93XX_PWMx_DUTY_CYCLE	0x04
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| #define EP93XX_PWMx_ENABLE	0x08
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| #define EP93XX_PWMx_INVERT	0x0c
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| 
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| struct ep93xx_pwm {
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| 	void __iomem *base;
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| 	struct clk *clk;
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| 	struct pwm_chip chip;
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| };
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| 
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| static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
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| {
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| 	return container_of(chip, struct ep93xx_pwm, chip);
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| }
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| 
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| static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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| {
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| 	struct platform_device *pdev = to_platform_device(chip->dev);
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| 
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| 	return ep93xx_pwm_acquire_gpio(pdev);
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| }
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| 
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| static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
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| {
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| 	struct platform_device *pdev = to_platform_device(chip->dev);
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| 
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| 	ep93xx_pwm_release_gpio(pdev);
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| }
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| 
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| static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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| 			    const struct pwm_state *state)
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| {
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| 	int ret;
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| 	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
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| 	bool enabled = state->enabled;
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| 	void __iomem *base = ep93xx_pwm->base;
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| 	unsigned long long c;
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| 	unsigned long period_cycles;
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| 	unsigned long duty_cycles;
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| 	unsigned long term;
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| 
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| 	if (state->polarity != pwm->state.polarity) {
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| 		if (enabled) {
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| 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
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| 			clk_disable_unprepare(ep93xx_pwm->clk);
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| 			enabled = false;
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| 		}
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| 
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| 		/*
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| 		 * The clock needs to be enabled to access the PWM registers.
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| 		 * Polarity can only be changed when the PWM is disabled.
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| 		 */
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| 		ret = clk_prepare_enable(ep93xx_pwm->clk);
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| 		if (ret)
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| 			return ret;
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| 
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| 		if (state->polarity == PWM_POLARITY_INVERSED)
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| 			writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
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| 		else
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| 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
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| 
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| 		clk_disable_unprepare(ep93xx_pwm->clk);
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| 	}
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| 
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| 	if (!state->enabled) {
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| 		if (enabled) {
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| 			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
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| 			clk_disable_unprepare(ep93xx_pwm->clk);
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| 		}
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| 
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| 		return 0;
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| 	}
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| 
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| 	/*
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| 	 * The clock needs to be enabled to access the PWM registers.
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| 	 * Configuration can be changed at any time.
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| 	 */
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| 	if (!pwm_is_enabled(pwm)) {
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| 		ret = clk_prepare_enable(ep93xx_pwm->clk);
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| 		if (ret)
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| 			return ret;
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| 	}
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| 
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| 	c = clk_get_rate(ep93xx_pwm->clk);
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| 	c *= state->period;
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| 	do_div(c, 1000000000);
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| 	period_cycles = c;
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| 
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| 	c = period_cycles;
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| 	c *= state->duty_cycle;
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| 	do_div(c, state->period);
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| 	duty_cycles = c;
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| 
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| 	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
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| 		term = readw(base + EP93XX_PWMx_TERM_COUNT);
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| 
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| 		/* Order is important if PWM is running */
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| 		if (period_cycles > term) {
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| 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
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| 			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
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| 		} else {
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| 			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
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| 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
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| 		}
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| 		ret = 0;
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| 	} else {
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| 		ret = -EINVAL;
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| 	}
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| 
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| 	if (!pwm_is_enabled(pwm))
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| 		clk_disable_unprepare(ep93xx_pwm->clk);
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| 
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| 	if (ret)
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| 		return ret;
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| 
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| 	if (!enabled) {
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| 		ret = clk_prepare_enable(ep93xx_pwm->clk);
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| 		if (ret)
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| 			return ret;
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| 
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| 		writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static const struct pwm_ops ep93xx_pwm_ops = {
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| 	.request = ep93xx_pwm_request,
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| 	.free = ep93xx_pwm_free,
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| 	.apply = ep93xx_pwm_apply,
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| 	.owner = THIS_MODULE,
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| };
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| 
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| static int ep93xx_pwm_probe(struct platform_device *pdev)
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| {
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| 	struct ep93xx_pwm *ep93xx_pwm;
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| 	int ret;
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| 
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| 	ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL);
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| 	if (!ep93xx_pwm)
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| 		return -ENOMEM;
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| 
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| 	ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0);
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| 	if (IS_ERR(ep93xx_pwm->base))
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| 		return PTR_ERR(ep93xx_pwm->base);
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| 
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| 	ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
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| 	if (IS_ERR(ep93xx_pwm->clk))
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| 		return PTR_ERR(ep93xx_pwm->clk);
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| 
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| 	ep93xx_pwm->chip.dev = &pdev->dev;
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| 	ep93xx_pwm->chip.ops = &ep93xx_pwm_ops;
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| 	ep93xx_pwm->chip.npwm = 1;
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| 
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| 	ret = pwmchip_add(&ep93xx_pwm->chip);
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| 	if (ret < 0)
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| 		return ret;
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| 
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| 	platform_set_drvdata(pdev, ep93xx_pwm);
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| 	return 0;
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| }
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| 
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| static int ep93xx_pwm_remove(struct platform_device *pdev)
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| {
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| 	struct ep93xx_pwm *ep93xx_pwm = platform_get_drvdata(pdev);
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| 
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| 	return pwmchip_remove(&ep93xx_pwm->chip);
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| }
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| 
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| static struct platform_driver ep93xx_pwm_driver = {
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| 	.driver = {
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| 		.name = "ep93xx-pwm",
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| 	},
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| 	.probe = ep93xx_pwm_probe,
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| 	.remove = ep93xx_pwm_remove,
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| };
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| module_platform_driver(ep93xx_pwm_driver);
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| 
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| MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
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| MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
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| MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
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| MODULE_ALIAS("platform:ep93xx-pwm");
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| MODULE_LICENSE("GPL");
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